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參數(shù)資料
| 型號(hào)： | EVAL-AD7707EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Evaluation Board for the AD7707 3V/5V, +/-10V Input Range, 1mW, 3Channel, 16-Bit, Sigma Delta ADC |
| 中文描述： | 評(píng)估板AD7707 3V/5V，/ - 10V的輸入范圍，1mW的，3Channel，16位Σ-Δ模數(shù)轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 8/16頁(yè) |
| 文件大小： | 525K |
| 代理商： | EVAL-AD7707EB |
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Rev. 0
EVAL-AD7707EB
T he Program AD 7707 Screen
Fig. 5. shows the screen that appears when the Program AD7707 button is selected. T his screen allows the user to select which
register is to be programmed. Before selecting any of the buttons on this screen the user should first choose the channel that
is to be used for all the subsequent operations. T he state of the Standby bit should also be selected here.
T he Setup Register Screen
Fig. 6. shows the Setup Register screen. When the screen is loaded the software will read the current contents from the Setup
Register of the AD7707 and change the option buttons accordingly. T he setup register is used to change the operating mode
of the AD7707, change the gain setting, set the part to bipolar or unipolar mode, set the part to buffered or unbuffered mode
and select the state of the FSYNC bit. Every time a change is made the software will write the new conditions to the AD7707
and read back the setup register for confirmation.
Fig. 6. The Setup Screen
When the user selects a calibration, the software will start the calibration by writing to the AD7707 and then monitor the
DRDY. A falling edge of the DRDY pin will indicate that the calibration has been completed. After a calibration the AD7707
returns to its normal operating mode and the program updates the screen to indicate this. T he default status for the setup
register on power-up is 01 (hex).
T he C lock Register Screen
Fig. 7. shows the Clock Register setup screen. T he Clock Register is used to control the output update rate of the AD7707.
T he CLK DIS bit is used to control the operation of the MCLK OUT pin.
A logic 0 in this bit allows the AD7707 to function in its normal operating mode when a crystal oscillator is used as the clock
source.
A logic 1 disables the MCLK OUT from appearing at the pin. When disabled the MCLK OUT pin is forced low. If the AD7707
is using a crystal oscillator as the clock then disabling the MCLK OUT will stop the clock and no conversions will be done
by the AD7707. T he user should consult the datasheet for more information on the use of the CLK DIS bit.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7708EB | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-AD7708EBZ | 功能描述:BOARD EVAL FOR AD7708 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7709EB | 制造商:Analog Devices 功能描述:EVAL KIT FOR 16BIT- ADC W/ SWITABLE CURRENT SOURCES - Bulk |
| EVAL-AD7710EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Signal Conditioning ADC |
| EVAL-AD7711EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Signal Conditioning ADC with RTD Excitation Currents |
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