
- 3 -
Rev. 0
EVAL-AD7707EB
E V A L UA T ION B OA R D INT E R F A C ING
Interfacing to the evaluation board is via either a 9-way d-type connector, SK T 1 or a 36-way centronics connector, SK T 2.
T he pin-out for the SK T 1 connector is shown in Fig. 2 and its pin designations are given in T able 2. T he pin-out for the
SK T 2 connector is shown in Fig. 3 and its pin designations are given in T able 3.
SK T 2 is used to connect the evaluation board to the parallel (printer) port of a PC. Connection is via a standard printer cable.
SK T 1 is used to connect the evaluation to any other system. T he evaluation board should be powered up before a cable is
connected to either of these connectors.
Fig. 2: Pin Configuration for the 9-Way D-Type Connector, SKT1.
T able 2.:
SKT 1 Pin Description
1
1
2
3
4
5
6
7
8
SC L K
DRDY
CS
RESET
D IN
D G N D
D OU T
DV
DD
Serial Clock. T he signal on this pin is buffered before being applied to the SCLK pin of the AD7707.
Logic output. T his is a buffered version of the signal on the AD7707
DRDY
pin
Chip Select. T he signal on this pin is buffered before being applied to the
CS
pin on the AD7707.
Reset Input. Data applied to this pin is buffered before being applied to the AD7707
RESET
pin.
Serial Data Input. Data applied to this pin is buffered before being applied to the AD7707 DIN pin.
Ground reference point for the digital circuitry. Connects to the DGND plane on the Evaluation board.
Serial Data Output. T his is a buffered version of the signal on the AD7707 DOUT pin.
Digital Supply Voltage. If no voltage is applied to the board's DV
DD
input terminal then the voltage applied to
this pin will supply the DV
DD
for the digital buffers.
Not Connected.
9
Note
N C
1
An explanation of the AD7707 functions mentioned here is given in T able 3 overleaf as part of the SK T 2 pin descriptions.
SE T -UP C OND IT IONS
Care should be taken before applying power and signals to the evaluation board to ensure that all link positions are as per the
required operating mode. T able 1 shows the position in which all the links are set when the evaluation board is sent out.
T able 1: Initial Link and Switch Positions
L ink No.
L K 1
L K 2
L K 3
L K 4
L K 5
L K 6
L K 7
L K 8
L K 9
L K 10
P osition
B+ B
A
A
A
IN
IN
IN
A
A
A
F unction
Both links in position "B" to select the on-board crystal as the master clock for the AD7707.
T his selects the AD780 +2.5V output as the on-board reference.
T his connects the REFIN(-) input of the AD7707 to AGND.
T he on-board reference provides the reference voltage for the REFIN(+) input of the AD7707.
T he AIN1 pin on the AD7707 is tied to the analog input sockets SK T 3.
T he AIN2 pin on the AD7707 is tied to the analog input sockets SK T 4.
T he AIN3 pin on the AD7707 is tied to the analog input sockets SK T 5.
T he LCOM pin on the AD7707 is tied to the AGND.
T he HBIAS pin of the AD7707 is tied to the REFIN+ pin.
T he HCOM pin on the AD7707 is tied to the AGND.
2
4
3
1
5
6
7
8
9