參數(shù)資料
型號： EVAL-AD7327SDZ
廠商： Analog Devices Inc
文件頁數(shù)： 25/37頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD7327SDZ
標準包裝： 1
系列： *
AD7327
Rev. B | Page 30 of 36
POWER VS. THROUGHPUT RATE
The power consumption of the AD7327 varies with throughput
rate. The static power consumed by the AD7327 is very low, and
significant power savings can be achieved as the throughput rate is
reduced. Figure 51 and Figure 52 shows the power vs. throughput
rate for the AD7327 at a VCC of 3 V and 5 V, respectively. Both
plots clearly show that the average power consumed by the
AD7327 is greatly reduced as the sample frequency is reduced.
This is true whether a fixed SCLK value is used or if it is scaled
with the sampling frequency. Figure 51 and Figure 52 show the
power consumption when operating in normal mode for a
variable SCLK that scales with the sampling frequency.
12
0
THROUGHPUT RATE (kSPS)
A
VER
A
G
E
PO
W
ER
(m
W
)
10
8
6
4
2
100
200
300
400
500
VARIABLE SCLK
VCC = 3V
VDD/VSS = ±12V
TA = 25°C
INTERNAL REFERENCE
05401-
052
Figure 51. Power vs. Throughput Rate with 3 V VCC
20
0
THROUGHPUT RATE (kSPS)
A
VER
A
G
E
PO
W
ER
(m
W
)
18
16
14
12
10
8
6
4
2
100
200
300
400
500
VARIABLE SCLK
VCC = 5V
VDD/VSS = ±12V
TA = 25°C
INTERNAL REFERENCE
05401-
053
Figure 52. Power vs. Throughput Rate with 5 V VCC
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