參數(shù)資料
型號(hào): ES25P80-75IG2Y
廠商: 優(yōu)先(蘇州)半導(dǎo)體有限公司
英文描述: 8Mbit CMOS 3.0 Volt Flash Memory with 75Mhz SPI Bus Interface
中文描述: 8Mbit的CMOS 3.0伏的閃存與75MHz的SPI總線接口
文件頁(yè)數(shù): 23/35頁(yè)
文件大?。?/td> 450K
代理商: ES25P80-75IG2Y
ESI
23
Rev. 0D May, 11, 2006
ES25P80
Excel Semiconductor inc.
ADVANCED INFORMATION
The Release from Deep Power Down and Read
Electronic Signature (RES) is terminated by driving
Chip Select (CS#) High after the Electronic Signa-
ture has been read at least once. Sending addi-
tional clock cycles on Serial Clock (SCK), while
Chip Select (CS#) is driven Low, causes the Elec-
tronic Signature to be output repeatedly.
When Chip Select (CS#) is driven High, the device
is put in the Stand-by Power mode. If the device
was not previously in the Deep Power Down mode,
the transition to the Stand-by Power mode is imme-
diate. If the device was previously in the Deep
Power Down mode, though, the transition to the
Stand-by mode is delayed by t
RES
, and Chip Select
(CS#) must remain High for at least t
RES(max)
, as
specified in Table 8. Once in the Stand-by Power
mode, the device waits to be selected, so that it can
receive, decode and execute instructions.
Read Parameter Page(RDPARA)
The Parameter Page is a 256-byte page of Flash
Memory that can be used for storing serial num-
bers, revision information and configuration data
that might typically be stored in an additional mem-
ory. Because the Parameter Page is relatively small
and separate from the array, the erase time is sig-
nificantly shorter than that of a sector erase (see
t
PE
in Table.8)
This makes it convenient for more frequent updates.
The Read Parameter Page instruction allows one or
more bytes of the Parameter page to be read. The
instruction is initiated by driving the CS# low and
then shifting the instruction code “53h” followed by a
24-bit address (A23-A0) into the SI pin. Only the
lower 8 address bits (A7-A0) are used, the 16 upper
most address bis (A23-A8) are ignored. The code
and address bits are latched on the rising edge of
the CLK pin. After the address is received
,
the data
byte of the addressed memory location will be
shifted out on the SO pin at the falling edge of CLK
with most significant bit (MSB) first. The address is
automatically incremented to the next higher
address after each byte of data is shifted out allow-
ing for a continuous stream of data. When the end of
the Parameter page is reached the address will wrap
to the beginning. The Read Parameter Page instruc-
tion is shown in Figure 19. The Read Parameter
Page (RDPARA) instruction is terminated by driving
Chip Select (CS#) High. Chip Select (CS#) can be
driven High at any time during data output. Any
Read Parameter Page (RDPARA) instruction, while
a Program, Erase, or Write cycle is in progress, is
rejected without having any effect on the cycle that is
in progress.
Figure 18. Release from Deep Power Down and Read Electronic
Signature (RES) Instruction Sequence
1
0 1 0 1 0 1 1
SI
0
1
2
3 4
5 6
7 8
9 10
28 29 30 31
32 33 34 35
36 37 38 39
SCK
CS#
SO
Device ID
MSB
MSB
Instruction
High Impedance
3 Dummy bytes
23
22
21
2
1
0
3
2
1
0
3
6
5
4
7
Standby Mode
Deep Power Down Mode
t
RES
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