參數(shù)資料
型號: EPM7064AELC44-5
廠商: ALTERA CORP
元件分類: PLD
英文描述: EE PLD, 5 ns, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 3/51頁
文件大?。?/td> 1559K
代理商: EPM7064AELC44-5
Altera Corporation
605
MAX 7000A Programmable Logic Device Family Data Sheet
Preliminary Information
Figure 4. MAX 7000A Parallel Expanders
Unused product terms in a macrocell can be allocated to a neighboring macrocell.
Programmable Interconnect Array
Logic is routed between LABs on the PIA. This global bus is a
programmable path that connects any signal source to any destination on
the device. All MAX 7000A dedicated inputs, I/O pins, and macrocell
outputs feed the PIA, which makes the signals available throughout the
entire device. Only the signals required by each LAB are actually routed
from the PIA into the LAB. Figure 5 shows how the PIA signals are routed
into the LAB. An EEPROM cell controls one input to a 2-input AND gate,
which selects a PIA signal to drive into the LAB.
Preset
Clock
Clear
Product-
Term
Select
Matrix
Preset
Clock
Clear
Product-
Term
Select
Matrix
Macrocell
Product-
Term Logic
From
Previous
Macrocell
To Next
Macrocell
Product-
Term Logic
36 Signals
from PIA
16 Shared
Expanders
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7064AELC44-7 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 64 Macro 36 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7064AELC84-10 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD
EPM7064AELC84-4 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD
EPM7064AELC84-5 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD
EPM7064AELC84-7 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD