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參數(shù)資料
| 型號： | EPM570 |
| 廠商： | Altera Corporation |
| 英文描述： | JTAG & In-System Programmability |
| 中文描述： | JTAG接口 |
| 文件頁數(shù)： | 9/10頁 |
| 文件大?。?/td> | 103K |
| 代理商： | EPM570 |
Altera Corporation
June 2004
Core Version a.b.c variable
3–9
MAX II Device Handbook, Volume 1
JTAG & In-System Programmability
The Quartus II software, Jam STAPL player, and Jam Byte-Code Player
provides the designer with the option to control real-time ISP (if used)
and allows the designer to control the timeline of new design
configuration into the SRAM (immediately or upon next power cycle).
Design Security
All MAX II devices contain a programmable security bit that controls
access to the data programmed into the CFM block. When this bit is
programmed, design programming information, stored in the CFM
block, cannot be copied or retrieved. This feature provides a high level of
design security because programmed data within flash memory cells is
invisible. The security bit that controls this function, as well as all other
programmed data, is reset only when the device is erased. The SRAM is
also invisible and cannot be accessed regardless of the security bit setting.
The UFM block data is not protected by the security bit and is accessible
through JTAG or logic array connections.
Programming with External Hardware
MAX II devices can be programmed by downloading the information via
in-circuit testers, embedded processors, the Altera
ByteblasterMV,
MasterBlaster, ByteBlaster II, and USB-Blaster cables, and through
the universal serial bus (USB)-based Altera Programming Unit (APU)
with the appropriate adapter.
BP Microsystems, System General, and other programming hardware
manufacturers provide programming support for Altera devices. Check
their web sites for device support information.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EPM570100C5N | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:The MAX II family of instant-on, non-volatile CPLDs is based on a 0.18-m, |
| EPM570F100A | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:MAX II Device Family |
| EPM570F100A5N | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX II 440 Macro 76 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| EPM570F100C | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:MAX II Device Family |
| EPM570F100C4N | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX II 440 Macro 76 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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