參數(shù)資料
型號： EPF81188AQC208-4
廠商： Altera
文件頁數(shù)： 8/62頁
文件大小： 0K
描述： IC FLEX 8000A FPGA 12K 208-PQFP
產(chǎn)品培訓模塊： Three Reasons to Use FPGA's in Industrial Designs
標準包裝： 72
系列： FLEX 8000
LAB/CLB數(shù)： 126
邏輯元件/單元數(shù)： 1008
輸入/輸出數(shù)： 148
門數(shù)： 12000
電源電壓： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 208-BFQFP
供應(yīng)商設(shè)備封裝： 208-PQFP（28x28）
其它名稱： 544-2248
16
Altera Corporation
FLEX 8000 Programmable Logic Device Family Data Sheet
FastTrack Interconnect
In the FLEX 8000 architecture, connections between LEs and device I/O
pins are provided by the FastTrack Interconnect, a series of continuous
horizontal (row) and vertical (column) routing channels that traverse the
entire FLEX 8000 device. This device-wide routing structure provides
predictable performance even in complex designs. In contrast, the
segmented routing structure in FPGAs requires switch matrices to
connect a variable number of routing paths, which increases the delays
between logic resources and reduces performance.
The LABs within FLEX 8000 devices are arranged into a matrix of
columns and rows. Each row of LABs has a dedicated row interconnect
that routes signals both into and out of the LABs in the row. The row
interconnect can then drive I/O pins or feed other LABs in the device.
Figure 8 shows how an LE drives the row and column interconnect.
Figure 8. FLEX 8000 LAB Connections to Row & Column Interconnect
LE1
LE2
Row Channels
16 Column
Channels
Each LE drives up to
two column channels.
to Local
Feedback
to Local
Feedback
Each LE drives one
row channel.
(1)
Note:
(1)
See Table 4 for the number of row channels.
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EPF81188AQC240-2 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 126 LABs 184 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
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EPF81188AQI2083 制造商:ALTERA 功能描述:NEW
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