Notes to tables: (1) See the Operating Requirements for Altera D" />
參數(shù)資料
型號: EPF6016ATI100-2
廠商: Altera
文件頁數(shù): 28/52頁
文件大?。?/td> 0K
描述: IC FLEX 6000 FPGA 16K 100-TQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 270
系列: FLEX 6000
LAB/CLB數(shù): 132
邏輯元件/單元數(shù): 1320
輸入/輸出數(shù): 81
門數(shù): 16000
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 100-TQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
34
Altera Corporation
FLEX 6000 Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
(2)
The minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to
5.75 V for input currents less than 100 mA and periods shorter than 20 ns.
(3)
Numbers in parentheses are for industrial-temperature-range devices.
(4)
Maximum VCC rise time is 100 ms. VCC must rise monotonically.
(5)
Typical values are for TA = 25° C and VCC = 3.3 V.
(6)
These values are specified under Table 16 on page 33.
(7)
The IOH parameter refers to high-level TTL or CMOS output current.
(8)
The IOL parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins
as well as output pins.
(9)
Capacitance is sample-tested only.
Table 17. FLEX 6000 3.3-V Device DC Operating Conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIH
High-level input voltage
1.7
5.75
V
VIL
Low-level input voltage
–0.5
0.8
V
VOH
3.3-V high-level TTL output
voltage
IOH = –8 mA DC, VCCIO = 3.00 V (7)
2.4
V
3.3-V high-level CMOS output
voltage
IOH = –0.1 mA DC, VCCIO = 3.00 V (7)
VCCIO –0.2
V
2.5-V high-level output voltage
IOH = –100 A DC, VCCIO = 2.30 V (7)
2.1
V
IOH = –1 mA DC, VCCIO = 2.30 V (7)
2.0
V
IOH = –2 mA DC, VCCIO = 2.30 V (7)
1.7
V
VOL
3.3-V low-level TTL output
voltage
IOL = 8 mA DC, VCCIO = 3.00 V (8)
0.45
V
3.3-V low-level CMOS output
voltage
IOL = 0.1 mA DC, VCCIO = 3.00 V (8)
0.2
V
2.5-V low-level output voltage
IOL = 100 A DC, VCCIO = 2.30 V (8)
0.2
V
IOL = 1 mA DC, VCCIO = 2.30 V (8)
0.4
V
IOL = 2 mA DC, VCCIO = 2.30 V (8)
0.7
V
II
Input pin leakage current
VI = 5.3 V to ground (8)
–10
10
A
IOZ
Tri-stated I/O pin leakage current VO = 5.3 V to ground (8)
–10
10
A
ICC0
VCC supply current (standby)
VI = ground, no load
0.5
5
mA
Table 18. FLEX 6000 3.3-V Device Capacitance
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input capacitance for I/O pin
VIN = 0 V, f = 1.0 MHz
8pF
CINCLK
Input capacitance for dedicated input VIN = 0 V, f = 1.0 MHz
12
pF
COUT
Output capacitance
VOUT = 0 V, f = 1.0 MHz
8pF
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EPF6016ATI100-2N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 132 LABs 81 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6016ATI144-2 制造商:Rochester Electronics LLC 功能描述:- Bulk
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