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參數(shù)資料
| 型號： | EP9315-IB |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 16/16頁 |
| 文件大小： | 0K |
| 描述： | IC ARM920T MCU 200MHZ 352-PBGA |
| 標準包裝： | 40 |
| 系列： | EP9 |
| 核心處理器： | ARM9 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 200MHz |
| 連通性： | EBI/EMI，EIDE，以太網(wǎng)，I²C，IrDA，鍵盤/觸摸屏，PCMCIA，SPI，UART/USART，USB |
| 外圍設(shè)備： | AC'97，DMA，I²S，LCD，LED，MaverickKey，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 16 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 32K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.65 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 352-BGA |
| 包裝： | 托盤 |
| 配用： | 598-1144-ND - KIT DEVELOPMENT EP9315 ARM9 |
| 其它名稱： | 598-1262 |
ER638E2B
9
Workaround
Insure that this kind of sequence of instructions does not occur. Note that adding a small number of
intervening instructions may not be sufficient to avoid this problem. If such a sequence must occur, insure
that the first and third instructions are sufficiently far apart in the instruction stream by placing five other
instructions between them:
cfadd32
c0, c1, c2
nop
; inserted extra instruction here
nop
; inserted extra instruction here
cfsub32ne
c0, c3, c4
; assume this does not execute
nop
; inserted extra instruction here
nop
; inserted extra instruction here
nop
; inserted extra instruction here
cfstr32
c0, [r2, #0x0]
The five intervening instructions need not be nops and may appear before or after the second instruction.
Note that it is the instruction stream as executed by the processor, not the instructions as they appear in the
source code, which is relevant. Hence, cases where the program flow changes between the first and third
instruction must be considered.
To avoid this error when entering exception and interrupt handlers, the first five instructions of an exception
or interrupt handler should not be coprocessor instructions.
Description 3
Under certain circumstances, data in coprocessor general purpose registers or in memory may be
corrupted. The error appears as follows.
1) Let the first instruction be a serialized instruction that does not execute1. For an instruction to be serial-
ized, at least one of the following must be true:
- The processor must be operating in serialized2 mode.
- The instruction must move to or from the DSPSC (either cfmv32sc or cfmvsc32).
2) Let the immediately following instruction be a two-word coprocessor load or store4.
In the case of a load, only the lower 32 bits (the first word) will be loaded into the target register. For example:
cfadd32ne
c0, c1, c2
; assume this does not execute
cfldr64
c3, [r2, #0x0]
The lower 32 bits of c3 will correctly become what is at the memory address in r2, but the upper 32 bits of
c3 will not become what is at address r2 + 0x4.
In the case of a store, only the lower 32 bits (the first word) will be stored into memory. For example:
cfadd32ne
c4, c5, c6
; assume this does not execute
cfstr64
c3, [r2, #0x0]
The lower 32 bits of c3 will be correctly written to the memory address in r2, but the upper 32 bits of c3 will
not be written.
(Continued)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EP9315-IBZ | 功能描述:微處理器 - MPU IC Universal Platfrm ARM9 SOC Prcessor RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| EP9316 | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines |
| EP9317 | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines |
| EP9318 | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines |
| EP9319 | 制造商:PCA 制造商全稱:PCA ELECTRONICS INC. 功能描述:14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines |
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