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DS653PP3
Copyright 2005 Cirrus Logic (All Rights Reserved)
5
EP9302
High-speed ARM9 System-on-chip Processor with MaverickCrunch
List of Tables
Table A. Change History .......................................................................................................... 2
Table B. General Purpose Memory Interface Pin Assignments .............................................. 6
Table C.Ethernet Media Access Controller Pin Assignments ................................................. 7
Table D.Audio Interfaces Pin Assignment .............................................................................. 7
Table E. 12-bit Analog-to-Digital Converter Pin Assignments ................................................. 7
Table F. Universal Asynchronous Receiver/Transmitters Pin Assignments ............................ 8
Table G.Dual Port USB Host Pin Assignments ....................................................................... 8
Table H.Two-Wire Port with EEPROM Support Pin Assignments .......................................... 8
Table I. Real-Time Clock with Pin Assignments ..................................................................... 8
Table J. PLL and Clocking Pin Assignments .......................................................................... 9
Table K. Interrupt Controller Pin Assignment .......................................................................... 9
Table L. Dual LED Pin Assignments ....................................................................................... 9
Table M.General Purpose Input/Output Pin Assignment ........................................................ 9
Table N.Reset and Power Management Pin Assignments ................................................... 10
Table O.Hardware Debug Interface ...................................................................................... 10
Table P. Pin List in Numerical Order by Pin Number ............................................................. 37
Table Q.Pin Descriptions
..................................................................................................... 39
Table R.Pin Multiplex Usage Information .............................................................................. 40