參數(shù)資料
型號： EP7311-EV-C
廠商： CIRRUS LOGIC INC
元件分類： 微控制器/微處理器
英文描述： HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
中文描述： 32-BIT, 74 MHz, RISC MICROCONTROLLER, PQFP208
封裝： LQFP-208
文件頁數(shù)： 45/54頁
文件大小： 1533K
代理商： EP7311-EV-C
DS506PP1
Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
45
EP7311
High-Performance, Low-Power System on Chip
M7
SSITXFR
I/O
MCP/CODEC/SSI2 frame sync
M8
DRIVE[1]
I/O
PWM drive output
M9
FB[0]
I
PWM feedback input
M10
COL[0]
O
Keyboard scanner column drive
M11
D[27]
I/O
Data I/O
M12
VSSIO
Pad ground
I/O ground
M13
A[23]/DRA[4]
O
System byte address / SDRAM address
M14
VDDIO
Pad power
Digital I/O power, 3.3V
M15
A[20]/DRA[7]
O
System byte address / SDRAM address
M16
D[21]
I/O
Data I/O
N1
nEXTFIQ
I
External fast interrupt input
N2
PE[1]/BOOTSEL[1]
I
GPIO port E / boot mode select
N3
VSSIO
Pad ground
I/O ground
N4
VDDIO
Pad power
Digital I/O power, 3.3V
N5
PD[5]
I/O
GPIO port D
N6
PD[2]
I/O
GPIO port D
N7
SSIRXDA
I/O
MCP/CODEC/SSI2 serial data input
N8
ADCCLK
O
SSI1 ADC serial clock
N9
SMPCLK
O
SSI1 ADC sample clock
N10
COL[2]
O
Keyboard scanner column drive
N11
D[29]
I/O
Data I/O
N12
D[26]
I/O
Data I/O
N13
HALFWORD
O
Halfword access select output
N14
VSSIO
Pad ground
I/O ground
N15
D[22]
I/O
Data I/O
N16
D[23]
I/O
Data I/O
P1
VSSRTC
RTC ground Real time clock ground
P2
RTCOUT
O
Real time clock oscillator output
P3
VSSIO
Pad ground
I/O ground
P4
VSSIO
Pad ground
I/O ground
P5
VDDIO
Pad power
Digital I/O power, 3.3V
P6
VSSIO
Pad ground
I/O ground
P7
VSSIO
Pad ground
I/O ground
P8
VDDIO
Pad power
Digital I/O power, 3.3V
P9
VSSIO
Pad ground
I/O ground
P10
VDDIO
Pad power
Digital I/O power, 3.3V
P11
VSSIO
Pad ground
I/O ground
P12
VSSIO
Pad ground
I/O ground
P13
VDDIO
Pad power
Digital I/O power
P14
VSSIO
Pad ground
I/O ground
P15
D[24]
I/O
Data I/O
P16
VDDIO
Pad power
Digital I/O power, 3.3V
R1
RTCIN
I/O
Real time clock oscillator input
R2
VDDIO
Pad power
Digital I/O power, 3.3V
R3
PD[4]
I/O
GPIO port D
R4
PD[1]
I/O
GPIO port D
R5
SSITXDA
O
MCP/CODEC/SSI2 serial data output
R6
nADCCS
O
SSI1 ADC chip select
Table V. 256-Ball PBGA Ball Listing (Continued)
Ball Location
Name
Type
Description
R7
VDDIO
Pad power
Digital I/O power, 3.3V
R8
ADCOUT
O
SSI1 ADC serial data output
R9
COL[7]
O
Keyboard scanner column drive
R10
COL[3]
O
Keyboard scanner column drive
R11
COL[1]
O
Keyboard scanner column drive
R12
D[30]
I/O
Data I/O
R13
A[27]/DRA[0]
O
System byte address / SDRAM address
R14
A[25]/DRA[2]
O
System byte address / SDRAM address
R15
VDDIO
Pad power
Digital I/O power, 3.3V
R16
A[24]/DRA[3]
O
System byte address / SDRAM address
T1
VDDRTC
RTC power
Real time clock power, 2.5V
T2
PD[7]/SDQM[1]
I/O
GPIO port D / SDRAM byte lane mask
T3
PD[6]/SDQM[0]
I/O
GPIO port D / SDRAM byte lane mask
T4
PD[3]
I/O
GPIO port D
T5
SSICLK
I/O
MCP/CODEC/SSI2 serial clock
T6
SSIRXFR
–
MCP/CODEC/SSI2 frame sync
T7
VDDCORE
Core power Core power, 2.5V
T8
DRIVE[0]
I/O
PWM drive output
T9
FB[1]
I
PWM feedback input
T10
COL[5]
O
Keyboard scanner column drive
T11
VDDIO
Pad power
Digital I/O power, 3.3V
T12
BUZ
O
Buzzer drive output
T13
D[28]
I/O
Data I/O
T14
A[26]/DRA[1]
O
System byte address / SDRAM address
T15
D[25]
I/O
Data I/O
T16
VSSIO
Pad ground
I/O ground
Table V. 256-Ball PBGA Ball Listing (Continued)
Ball Location
Name
Type
Description
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