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參數(shù)資料
| 型號： | EP7311-EV-C |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| 中文描述： | 32-BIT, 74 MHz, RISC MICROCONTROLLER, PQFP208 |
| 封裝： | LQFP-208 |
| 文件頁數(shù)： | 21/54頁 |
| 文件大?。?/td> | 1533K |
| 代理商： | EP7311-EV-C |
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DS506PP1
Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
21
EP7311
High-Performance, Low-Power System on Chip
Static Memory Burst Read Cycle
Note: 1. Four cycles are shown in the above diagram (minimum wait states, 1-0-0-0). This is the maximum number of consecutive
cycles that can be driven. The number of consecutive cycles can be programmed from 2 to 4, inclusively.
2. The cycle time can be extended by integer multiples of the clock period (22 ns at 45 MHz, 27 ns at 36 MHz, 54 ns at
18.432 MHz, and 77 ns at 13 MHz), by either driving EXPRDY low and/or by programming a number of wait states. EXPRDY is
sampled on the falling edge of EXPCLK before the data transfer. If low at this point, the transfer is delayed by one clock period
where EXPRDY is sampled again. EXPCLK need not be referenced when driving EXPRDY, but is shown for clarity.
3. Consecutive reads with sequential access enabled are identical except that the sequential access wait state field is used to
determine the number of wait states, and no idle cycles are inserted between successive non-sequential ROM/expansion
cycles. This improves performance so the SQAEN bit should always be set where possible.
4. Address, Halfword, Word, and Write hold state until next cycle.
EXPCLK
nCS
A
nMOE
HALF
WORD
WORD
D
nMWE
EXPRDY
WRITE
t
CSd
t
Ad
t
Ah
t
Ah
t
Ah
t
CSh
t
MOEh
t
MOEd
t
EXs
t
EXh
t
Ds
t
Dh
t
Ds
t
Ds
t
Ds
t
Dh
t
Dh
t
Dh
t
WRd
t
HWd
t
WDd
Figure 9. Static Memory Burst Read Cycle Timing Measurement
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EP7311-IB-C | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7311-IV-C | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7311-IR-C | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7312-EV-90 | HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7312-EV-C | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EP7311-IB | 功能描述:音頻片上系統(tǒng) - SoC IC Ultra Low PWR Hi Perf SOC w/LCD RoHS:否 制造商:Cirrus Logic |
| EP7311-IB-90 | 功能描述:音頻片上系統(tǒng) - SoC IC Ultra Low PWR Hi Perf SOC w/LCD RoHS:否 制造商:Cirrus Logic |
| EP7311-IB-C | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7311-IBZ | 制造商:Cirrus Logic 功能描述:IC, 32BIT MCU, ARM7, 74MHZ, BGA-256, Controller Family/Series:(ARM7), Core Size: |
| EP7311-IR | 功能描述:IC ARM720T MCU 74MHZ 204-TFBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:EP7 標準包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設備:欠壓檢測/復位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲器容量:8KB（4K x 16） 程序存儲器類型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR) |
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