參數(shù)資料
型號(hào): EP4CGX30CF23I7
廠商: Altera
文件頁(yè)數(shù): 15/42頁(yè)
文件大小: 0K
描述: IC CYCLONE IV GX FPGA 30K 484FBG
產(chǎn)品培訓(xùn)模塊: Cyclone IV FPGA Family Overview
特色產(chǎn)品: Cyclone? IV FPGAs
標(biāo)準(zhǔn)包裝: 60
系列: CYCLONE® IV GX
LAB/CLB數(shù): 1840
邏輯元件/單元數(shù): 29440
RAM 位總計(jì): 1105920
輸入/輸出數(shù): 290
電源電壓: 1.16 V ~ 1.24 V
安裝類(lèi)型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 484-BGA
供應(yīng)商設(shè)備封裝: 484-FBGA(23x23)
1–22
Chapter 1: Cyclone IV Device Datasheet
Switching Characteristics
December 2013
Altera Corporation
Figure 1–4 shows the differential receiver input waveform.
Figure 1–5 shows the transmitter output waveform.
Table 1–22 lists the typical VOD for Tx term that equals 100 .
Figure 1–4. Receiver Input Waveform
Single-Ended Waveform
Differential Waveform
VID (diff peak-peak) = 2 x VID (single-ended)
Positive Channel (p)
Negative Channel (n)
Ground
VID
p
n = 0 V
VCM
Figure 1–5. Transmitter Output Waveform
Single-Ended Waveform
Differential Waveform
VOD (diff peak-peak) = 2 x VOD (single-ended)
Positive Channel (p)
Negative Channel (n)
Ground
VOD
p
n = 0 V
VCM
Table 1–22. Typical VOD Setting, Tx Term = 100
Symbol
VOD Setting (mV)
12
3
4 (1)
56
VOD differential peak
to peak typical (mV)
400
600
800
900
1000
1200
Note to Table 1–22:
(1) This setting is required for compliance with the PCIe protocol.
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EP4CGX30CF23I7N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Cyclone IV GX 1840 LABs 290 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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