參數(shù)資料
型號： EP20K400ERI240-1
廠商： ALTERA CORP
元件分類： PLD
英文描述： LOADABLE PLD, PQFP240
封裝： HEAT SINK, POWER, QFP-240
文件頁數(shù)： 61/65頁
文件大小： 781K
代理商： EP20K400ERI240-1
86
Altera Corporation
APEX 20K Programmable Logic Device Family Data Sheet
Preliminary Information
Notes to table:
(1)
All pins that are not listed are user I/O pins.
(2)
This pin is a dedicated pin; it is not available as a user I/O pin.
(3)
This pin can be used as a user I/O pin if it is not used for its device-wide or
configuration function.
(4)
This pin can be used as a user I/O pin after configuration.
(5)
This pin is tri-stated in user mode.
(6)
This pin shows the status of the ClockLock and ClockBoost circuitry. When the
ClockLock and ClockBoost circuitry is locked to the incoming clock and generates
an internal clock, LOCK is driven high. LOCK remains high if a periodic clock stops
clocking. The LOCK function is optional; if the LOCK output is not used, this pin is a
user I/O pin.
(7)
This pin drives the ClockLock and ClockBoost circuitry.
(8)
This pin is the power or ground for the ClockLock and ClockBoost circuitry. To
ensure noise resistance, the power and ground supply to the ClockLock and
ClockBoost circuitry should be isolated from the power and ground to the rest of
the device. If the ClockLock or ClockBoost circuitry is not used, this power or
ground pin should be connected to VCCINT or GNDINT, respectively.
(9)
The user I/O pin count includes dedicated input pins, dedicated clock pins, and all
I/O pins.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K400FC672-1 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 1664 Macros 502 IO RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K400FC672-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K400FC672-1X 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 1664 Macros 502 IO RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K400FC672-2 功能描述:FPGA - 現(xiàn)場可編程門陣列 CPLD - APEX 20K 1664 Macros 502 IO RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K400FC672-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
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