參數(shù)資料
型號： EP1K10QC208-2
廠商： Altera
文件頁數(shù)： 19/86頁
文件大?。?/td> 0K
描述： IC ACEX 1K FPGA 10K 208-PQFP
產(chǎn)品培訓(xùn)模塊： Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝： 144
系列： ACEX-1K®
LAB/CLB數(shù)： 72
邏輯元件/單元數(shù)： 576
RAM 位總計(jì)： 12288
輸入/輸出數(shù)： 120
門數(shù)： 56000
電源電壓： 2.375 V ~ 2.625 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 70°C
封裝/外殼： 208-BFQFP
供應(yīng)商設(shè)備封裝： 208-PQFP（28x28）
26
Altera Corporation
ACEX 1K Programmable Logic Device Family Data Sheet
FastTrack Interconnect Routing Structure
In the ACEX 1K architecture, connections between LEs, EABs, and device
I/O pins are provided by the FastTrack Interconnect routing structure,
which is a series of continuous horizontal and vertical routing channels
that traverse the device. This global routing structure provides
predictable performance, even in complex designs. In contrast, the
segmented routing in FPGAs requires switch matrices to connect a
variable number of routing paths, increasing the delays between logic
resources and reducing performance.
The FastTrack Interconnect routing structure consists of row and column
interconnect channels that span the entire device. Each row of LABs is
served by a dedicated row interconnect. The row interconnect can drive
I/O pins and feed other LABs in the row. The column interconnect routes
signals between rows and can drive I/O pins.
Row channels drive into the LAB or EAB local interconnect. The row
signal is buffered at every LAB or EAB to reduce the effect of fan-out on
delay. A row channel can be driven by an LE or by one of three column
channels. These four signals feed dual 4-to-1 multiplexers that connect to
two specific row channels. These multiplexers, which are connected to
each LE, allow column channels to drive row channels even when all eight
LEs in a LAB drive the row interconnect.
Each column of LABs or EABs is served by a dedicated column
interconnect. The column interconnect that serves the EABs has twice as
many channels as other column interconnects. The column interconnect
can then drive I/O pins or another row’s interconnect to route the signals
to other LABs or EABs in the device. A signal from the column
interconnect, which can be either the output of a LE or an input from an
I/O pin, must be routed to the row interconnect before it can enter a LAB
or EAB. Each row channel that is driven by an IOE or EAB can drive one
specific column channel.
Access to row and column channels can be switched between LEs in
adjacent pairs of LABs. For example, a LE in one LAB can drive the row
and column channels normally driven by a particular LE in the adjacent
LAB in the same row, and vice versa. This flexibility enables routing
resources to be used more efficiently. Figure 13 shows the ACEX 1K LAB.
相關(guān)PDF資料
PDF描述
EP1K10QC208-2N IC ACEX 1K FPGA 10K 208-PQFP
EX64-TQG100I IC FPGA ANTIFUSE 3K 100-TQFP
EX64-TQ100I IC FPGA ANTIFUSE 3K 100-TQFP
ACM43DSEN-S13 CONN EDGECARD EXTEND 86POS 0.156
AGLN250V5-CSG81I IC FPGA NANO 1KB 250K 81-CSP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP1K10QC208-2N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 72 LABs 120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K10QC208-3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 72 LABs 120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K10QC208-3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 72 LABs 120 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K10TC100-1 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 72 LABs 66 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K10TC100-1N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 72 LABs 66 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*