參數(shù)資料
型號: ENC624J600-I/PT
廠商: Microchip Technology
文件頁數(shù): 120/168頁
文件大?。?/td> 0K
描述: IC ETHERNET CTRLR W/SPI 64-TQFP
視頻文件: Fast 100 Mbps Ethernet PICtail Plus Overview
標準包裝: 160
控制器類型: 以太網(wǎng)控制器(IEEE 802.3)
接口: SPI
電源電壓: 3 V ~ 3.6 V
電流 - 電源: 96mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-TQFP
供應(yīng)商設(shè)備封裝: 64-TQFP(10x10)
包裝: 托盤
產(chǎn)品目錄頁面: 684 (CN2011-ZH PDF)
配用: AC164132-ND - BOARD DAUGHTER PICTAIL ETHERNET
2007 Microchip Technology Inc.
DS21993C-page 53
PIC16CR7X
8.0
CAPTURE/COMPARE/PWM
MODULES
Each Capture/Compare/PWM (CCP) module contains
a 16-bit register which can operate as a:
16-bit Capture register
16-bit Compare register
PWM Master/Slave Duty Cycle register
Both the CCP1 and CCP2 modules are identical in
operation, with the exception being the operation of the
special event trigger. Table 8-1 and Table 8-2 show the
resources and interactions of the CCP module(s). In
the following sections, the operation of a CCP module
is described with respect to CCP1. CCP2 operates the
same as CCP1, except where noted.
8.1
CCP1 Module
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is
generated by a compare match and will clear both
TMR1H and TMR1L registers.
8.2
CCP2 Module
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP2CON register controls
the operation of CCP2. The special event trigger is
generated by a compare match; it will clear both
TMR1H and TMR1L registers, and start an A/D conver-
sion (if the A/D module is enabled).
Additional information on CCP modules is available in
the “PIC Mid-Range MCU Family Reference Manual”
(DS33023) and in Application Note AN594, “Using the
CCP Modules” (DS00594).
TABLE 8-1:
CCP MODE – TIMER
RESOURCES REQUIRED
TABLE 8-2:
INTERACTION OF TWO CCP MODULES
CCP Mode
Timer Resource
Capture
Timer1
Compare
Timer1
PWM
Timer2
CCPx Mode CCPy Mode
Interaction
Capture
Same TMR1 time base.
Capture
Compare
Same TMR1 time base.
Compare
Same TMR1 time base.
PWM
The PWMs will have the same frequency and update rate (TMR2 interrupt).
The rising edges are aligned.
PWM
Capture
None.
PWM
Compare
None.
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