參數(shù)資料
型號: ENC624J600-I/PT
廠商: Microchip Technology
文件頁數(shù): 11/168頁
文件大?。?/td> 0K
描述: IC ETHERNET CTRLR W/SPI 64-TQFP
視頻文件: Fast 100 Mbps Ethernet PICtail Plus Overview
標準包裝: 160
控制器類型: 以太網(wǎng)控制器(IEEE 802.3)
接口: SPI
電源電壓: 3 V ~ 3.6 V
電流 - 電源: 96mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-TQFP
供應商設備封裝: 64-TQFP(10x10)
包裝: 托盤
產(chǎn)品目錄頁面: 684 (CN2011-ZH PDF)
配用: AC164132-ND - BOARD DAUGHTER PICTAIL ETHERNET
PIC18F2220/2320/4220/4320
DS39599G-page 106
2007 Microchip Technology Inc.
TABLE 10-3:
PORTB FUNCTIONS
TABLE 10-4:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name
Bit#
Buffer
Function
RB0/AN12/INT0
bit 0
TTL(1)/ST(2) Input/output pin, analog input or external interrupt input 0.
Internal software programmable weak pull-up.
RB1/AN10/INT1
bit 1
TTL(1)/ST(2) Input/output pin, analog input or external interrupt input 1.
Internal software programmable weak pull-up.
RB2/AN8/INT2
bit 2
TTL(1)/ST(2) Input/output pin, analog input or external interrupt input 2.
Internal software programmable weak pull-up.
RB3/AN9/CCP2
bit 3
TTL(1)/ST(3) Input/output pin or analog input. Capture 2 input/Compare 2 output/
PWM output when CCP2MX Configuration bit is set(4).
Internal software programmable weak pull-up.
RB4/AN11/KBI0
bit 4
TTL
Input/output pin (with interrupt-on-change) or analog input.
Internal software programmable weak pull-up.
RB5/KBI1/PGM
bit 5
TTL/ST(5)
Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Low-voltage ICSP enable pin.
RB6/KBI2/PGC
bit 6
TTL/ST(5)
Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Serial programming clock.
RB7/KBI3/PGD
bit 7
TTL/ST(5)
Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Serial programming data.
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1:
This buffer is a TTL input when configured as digital I/O.
2:
This buffer is a Schmitt Trigger input when configured as the external interrupt.
3:
This buffer is a Schmitt Trigger input when configured as the CCP2 input.
4:
A device Configuration bit selects which I/O pin the CCP2 pin is multiplexed on.
5:
This buffer is a Schmitt Trigger input when used in Serial Programming mode.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
xxxx xxxx
uuuu uuuu
LATB
LATB Data Latch Register
xxxx xxxx
uuuu uuuu
TRISB
PORTB Data Direction Register
1111 1111
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
0000 000x
0000 000u
INTCON2
RBPU
INTEDG0 INTEDG1 INTEDG2
TMR0IP
—RBIP
1111 -1-1
INTCON3
INT2IP
INT1IP
INT2IE
INT1IE
INT2IF
INT1IF
11-0 0-00
ADCON1
VCFG1
VCFG0
PCFG3
PCFG2
PCFG1
PCFG0
--00 0000
Legend:
x = unknown, u = unchanged, — = unimplemented locations read as ‘0’. Shaded cells are not used by PORTB.
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