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參數(shù)資料
| 型號： | EL4584CSZ-EVAL |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVALUATION BOARD FOR EL4584 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 計時，PLL |
| 嵌入式： | 否 |
| 已用 IC / 零件： | EL4584CSZ |
| 主要屬性： | 適用于高達(dá) 36 MHz 的視頻 |
| 次要屬性： | 5V 電源，< 2ns 抖動（VCXO） |
| 已供物品： | 板 |
15
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7174.3
May 9, 2008
EL4584
Plastic Dual-In-Line Packages (PDIP)
MDP0031
PLASTIC DUAL-IN-LINE PACKAGE
SYMBOL
INCHES
TOLERANCE
NOTES
PDIP8
PDIP14
PDIP16
PDIP18
PDIP20
A
0.210
MAX
A1
0.015
MIN
A2
0.130
±0.005
b
0.018
±0.002
b2
0.060
+0.010/-0.015
c
0.010
+0.004/-0.002
D
0.375
0.750
0.890
1.020
±0.010
1
E
0.310
+0.015/-0.010
E1
0.250
±0.005
2
e
0.100
Basic
eA
0.300
Basic
eB
0.345
±0.025
L
0.125
±0.010
N
8
14
16
18
20
Reference
Rev. C 2/07
NOTES:
1. Plastic or metal protrusions of 0.010” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions E and eA are measured with the leads constrained perpendicular to the seating plane.
4. Dimension eB is measured with the lead tips unconstrained.
5. 8 and 16 lead packages have half end-leads as shown.
D
L
A
e
b
A1
NOTE 5
A2
SEATING
PLANE
L
N
PIN #1
INDEX
E1
12
N/2
b2
E
eB
eA
c
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EL4584CSZ-T13 | 功能描述:鎖相環(huán) - PLL EL4584CSZ H-SYNC GEN LOCK RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| EL4584CSZ-T7 | 功能描述:鎖相環(huán) - PLL EL4584CSZ H-SYNC GEN LOCK RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| EL4585 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Horizontal Genlock, 8FSC |
| EL4585C | 制造商:ELANTEC 制造商全稱:ELANTEC 功能描述:Horizontal Genlock, 8 FSC |
| EL4585CN | 功能描述:IC PLL VIDEO GP 36MHZ 16-DIP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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