參數(shù)資料
型號(hào): EFM32TG230F32
廠商: Energy Micro
文件頁(yè)數(shù): 30/136頁(yè)
文件大?。?/td> 0K
描述: MCU 32BIT 32KB FLASH 64-QFN
特色產(chǎn)品: EFM32 Tiny Gecko
標(biāo)準(zhǔn)包裝: 1
系列: Tiny Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: EBI/EMI,I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 56
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 914-1035-6
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...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
125
www.energymicro.com
increase the average speed of memory accesses and so improve processor
performance.
Condition field
A four-bit field in an instruction that specifies a condition under which the
instruction can execute.
Conditional execution
If the condition code flags indicate that the corresponding condition is true
when the instruction starts executing, it executes normally. Otherwise, the
instruction does nothing.
Context
The environment that each process operates in for a multitasking operating
system. In ARM processors, this is limited to mean the physical address
range that it can access in memory and the associated memory access
permissions.
Coprocessor
A processor that supplements the main processor. Cortex-M3 does not
support any coprocessors.
Debugger
A debugging system that includes a program, used to detect, locate, and
correct software faults, together with custom hardware that supports software
debugging.
Direct
Memory
Access
(DMA)
An operation that accesses main memory directly, without the processor
performing any accesses to the data concerned.
Doubleword
A 64-bit data item. The contents are taken as being an unsigned integer
unless otherwise stated.
Doubleword-aligned
A data item having a memory address that is divisible by eight.
Endianness
Byte ordering. The scheme that determines the order that successive bytes
of a data word are stored in memory. An aspect of the system’s memory
mapping.
See Also Little-endian and Big-endian.
Exception
An event that interrupts program execution. When an exception occurs,
the processor suspends the normal program flow and starts execution at
the address indicated by the corresponding exception vector. The indicated
address contains the first instruction of the handler for the exception.
An exception can be an interrupt request, a fault, or a software-generated
system exception. Faults include attempting an invalid memory access,
attempting to execute an instruction in an invalid processor state, and
attempting to execute an undefined instruction.
Exception service routine
See Interrupt handler.
Exception vector
See Interrupt vector.
Flat address mapping
A system of organizing memory in which each physical address in the
memory space is the same as the corresponding virtual address.
Halfword
A 16-bit data item.
Illegal instruction
An instruction that is architecturally Undefined.
Implementation-defined
The behavior is not architecturally defined, but is defined and documented
by individual implementations.
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