參數(shù)資料
型號: EFM32G890F64
廠商: Energy Micro
文件頁數(shù): 56/71頁
文件大小: 0K
描述: MCU 32BIT 64KB FLASH 112-BGA
標準包裝: 1,000
系列: Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: EBI/EMI,I²C,IrDA,智能卡,SPI,UART/USART
外圍設備: 欠壓檢測/復位,DMA,LCD,POR,PWM,WDT
輸入/輸出數(shù): 90
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉換器: A/D 8x12b,D/A 2x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 112-LFBGA
包裝: 帶卷 (TR)
其它名稱: EFM32G890F64-BGA112
...the world's most energy friendly microcontrollers
2013-06-28 - EFM32G890FXX - d0010_Rev1.60
6
www.energymicro.com
2.1.20 Analog Comparator (ACMP)
The Analog Comparator is used to compare the voltage of two analog inputs, with a digital output indi-
cating which input voltage is higher. Inputs can either be one of the selectable internal references or from
external pins. Response time and thereby also the current consumption can be configured by altering
the current supply to the comparator.
2.1.21 Voltage Comparator (VCMP)
The Voltage Supply Comparator is used to monitor the supply voltage from software. An interrupt can
be generated when the supply falls below or rises above a programmable threshold. Response time and
thereby also the current consumption can be configured by altering the current supply to the comparator.
2.1.22 Analog to Digital Converter (ADC)
The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to 12 bits
at up to one million samples per second. The integrated input mux can select inputs from 8 external
pins and 6 internal signals.
2.1.23 Digital to Analog Converter (DAC)
The Digital to Analog Converter (DAC) can convert a digital value to an analog output voltage. The DAC
is fully differential rail-to-rail, with 12-bit resolution. It has two single ended output buffers which can be
combined into one differential output. The DAC may be used for a number of different applications such
as sensor interfaces or sound output.
2.1.24 Advanced Encryption Standard Accelerator (AES)
The AES accelerator performs AES encryption and decryption with 128-bit or 256-bit keys. Encrypting or
decrypting one 128-bit data block takes 52 HFCORECLK cycles with 128-bit keys and 75 HFCORECLK
cycles with 256-bit keys. The AES module is an AHB slave which enables efficient access to the data
and key registers. All write accesses to the AES module must be 32-bit operations, i.e. 8- or 16-bit
operations are not supported.
2.1.25 General Purpose Input/Output (GPIO)
In the EFM32G890, there are 90 General Purpose Input/Output (GPIO) pins, which are divided into ports
with up to 16 pins each. These pins can individually be configured as either an output or input. More
advanced configurations like open-drain, filtering and drive strength can also be configured individually
for the pins. The GPIO pins can also be overridden by peripheral pin connections, like Timer PWM
outputs or USART communication, which can be routed to several locations on the device. The GPIO
supports up to 16 asynchronous external pin interrupts, which enables interrupts from any pin on the
device. Also, the input value of a pin can be routed through the Peripheral Reflex System to other
peripherals.
2.1.26 Liquid Crystal Display Driver (LCD)
The LCD driver is capable of driving a segmented LCD display with up to 4x40 segments. A voltage
boost function enables it to provide the LCD display with higher voltage than the supply voltage for the
device. In addition, an animation feature can run custom animations on the LCD display without any
CPU intervention. The LCD driver can also remain active even in Energy Mode 2 and provides a Frame
Counter interrupt that can wake-up the device on a regular basis for updating data.
2.2 Configuration Summary
The features of the EFM32G890 is a subset of the feature set described in the EFM32G Reference
Manual. Table 2.1 (p. 7) describes device specific implementation of the features.
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