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參數(shù)資料
| 型號： | ECOG1 |
| 英文描述： | eCOG1 Microcontroller |
| 中文描述： | eCOG1微控制器 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大小： | 277K |
| 代理商： | ECOG1 |
PRELIMINARY
V3.1
www.cyantechnology.com
7
Reg Register Access Field
Reg field
reg
regd
regx
rega
00
AH
01
AL
XH
AL
10
X
11
Y
Indicates UNSIGNED prefix instruction required for this instruction.
<nn> represents the instruction operand for instructions with a specific addressing mode.
Operand
Opcode
Reg Mode
Assembler
Operation
Flags
-
H’3
-
ADD
reg, data
reg
! reg + data
CSNZ
-
H’4
-
ADDC
reg, data
reg
! reg + data + C
CSNZ
-
H’5
-
SUB
reg, data
reg
! reg – data
CSNZ
-
H’6
-
SUBC
reg, data
reg
! reg – data – C
CSNZ
-
H’7
-
NADD
reg, data
reg
! -reg + data
CSNZ
-
H’8
-
CMP
reg, data
flags
! reg – data
CSNZ
-
H’9
00
-
UMULT
data
A
! AL * data
-
H’9
00
-
SMULT
data
Sign Extend. A
! AL * data
-
H’9
01
-
UDIV
data
AL
! A
÷ data; AH ! rem
-
H’9
01
-
SDIV
data
Sign Extend. AL
! A
÷ data; AH ! rem
-
H’9
10
-
TST
data
flags
! data
NZ
-
H’9
11
-
BSR
addr
X
! PC + 1; PC ! branch_addr
-
H’A
00
-
ASL
data
C
![AH, AL]!0
C
-
H’A
00
-
LSL
data
C
![AH, AL]!0
C
-
H’A
01
-
ASR
data
AH[15]
"[AH, AL]"C
C
-
H’A
01
-
LSR
data
0
"[AH,AL]"C
C
-
H’A
10
-
ROL
data
C
![AH,AL]!C
C
-
H’A
11
-
ROR
data
C
"[AH,AL]"C
C
-
H’B
-
OR
reg, data
reg
! reg | data
NZ
-
H’C
-
AND
reg, data
reg
! reg & data
NZ
-
H’D
-
XOR
reg, data
reg
! reg ^ data
NZ
-
H’E
00
-
BRA
addr
PC
! branch_addr
-
H’E
01
-
BLT
addr
if S = 1 PC
! branch_addr
-
H’E
10
-
BPL
addr
if N = 0 PC
! branch_addr
-
H’E
11
-
BMI
addr
if N = 1 PC
! branch_addr
-
H’F
00
-
BNE
addr
if Z = 0 PC
! branch_addr
-
H’F
01
-
BEQ
addr
if Z = 1 PC
! branch_addr
-
H’F
10
-
BCC
addr
if C = 0 PC
! branch_addr
-
H’F
11
-
BCS
addr
if C = 1 PC
! branch_addr
-
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