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參數(shù)資料
| 型號(hào)： | DSPIC30F2012-30I/SP |
| 廠商： | Microchip Technology |
| 文件頁(yè)數(shù)： | 6/66頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DSPIC MCU/DSP 12K 28DIP |
| 產(chǎn)品培訓(xùn)模塊： | Serial Communications using dsPIC30F I2C Serial Communications using dsPIC30F SPI Serial Communications using dsPIC30F UART dsPIC30F 12 bit ADC - Part 2 dsPIC30F Addressing Modes - Part 1 dsPIC30F Architecture - Part 1 dsPIC30F DSP Engine & ALU dsPIC30F Interrupts dsPIC30F Motor Control PWM dsPIC Timers Asynchronous Stimulus dsPIC30F Addressing Modes - Part 2 dsPIC30F Architecture - Part 2 dsPIC30F 12-bit ADC Part 1 |
| 標(biāo)準(zhǔn)包裝： | 15 |
| 系列： | dsPIC™ 30F |
| 核心處理器： | dsPIC |
| 芯體尺寸： | 16-位 |
| 速度： | 30 MIP |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 20 |
| 程序存儲(chǔ)器容量： | 12KB（4K x 24） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.5 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 10x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-DIP（0.300"，7.62mm） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 650 (CN2011-ZH PDF) |
| 配用： | DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE |
| 其它名稱： | DSPIC30F201230ISP |
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dsPIC30F Flash Programming Specification
DS70102K-page 14
2010 Microchip Technology Inc.
EBS
FBS
Boot Segment Data EEPROM Code Protection (only present in dsPIC30F5011/
5013/6010A/6011A/6012A/6013A/6014A/6015)
1 = No Data EEPROM is reserved for Boot Segment
0 = 128 bytes of Data EEPROM are reserved for Boot Segment in dsPIC30F5011/
5013, and 256 bytes in dsPIC30F6010A/6011A/6012A/6013A/6014A/6015
BSS<2:0>
FBS
Boot Segment Program Memory Code Protection (only present in
dsPIC30F5011/5013/6010A/6011A/6012A/6013A/6014A/6015)
111 = No Boot Segment
110 = Standard security; Small-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x0003FF]
101 = Standard security; Medium-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x000FFF]
100 = Standard security; Large-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x001FF]
011 = No Boot Segment
010 = High security; Small-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x0003FF]
001 = High security; Medium-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x000FFF]
000 = High security; Large-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x001FFF]
BWRP
FBS
Boot Segment Program Memory Write Protection (only present in
dsPIC30F5011/5013/6010A/6011A/6012A/6013A/6014A/6015)
1 = Boot Segment program memory is not write-protected
0 = Boot Segment program memory is write-protected
RSS<1:0>
FSS
Secure Segment Data RAM Code Protection (only present in dsPIC30F5011/
5013/6010A/6011A/6012A/6013A/6014A/6015)
11 = No Data RAM is reserved for Secure Segment
10 = Small-sized Secure RAM
[(256 – N) bytes of RAM are reserved for Secure Segment]
01 = Medium-sized Secure RAM
[(768 – N) bytes of RAM are reserved for Secure Segment in dsPIC30F5011/
5013, and (2048 – N) bytes in dsPIC30F6010A/6011A/6012A/6013A/6014A/
6015]
00 = Large-sized Secure RAM
[(1024 – N) bytes of RAM are reserved for Secure Segment in dsPIC30F5011/
5013, and (4096 – N) bytes in dsPIC30F6010A/6011A/6012A/6013A/6014A/
6015]
where N = Number of bytes of RAM reserved for Boot Sector.
ESS<1:0>
FSS
Secure Segment Data EEPROM Code Protection (only present in
dsPIC30F5011/5013/6010A/6011A/6012A/6013A/6014A/6015)
11 = No Data EEPROM is reserved for Secure Segment
10 = Small-sized Secure Data EEPROM
[(128 – N) bytes of Data EEPROM are reserved for Secure Segment in
dsPIC30F5011/5013, and (256 – N) bytes in dsPIC30F6010A/6011A/6012A/
6013A/6014A/6015]
01 = Medium-sized Secure Data EEPROM
[(256 – N) bytes of Data EEPROM are reserved for Secure Segment in
dsPIC30F5011/5013, and (512 – N) bytes in dsPIC30F6010A/6011A/6012A/
6013A/6014A/6015]
00 = Large-sized Secure Data EEPROM
[(512 – N) bytes of Data EEPROM are reserved for Secure Segment in
dsPIC30F5011/5013, (1024 – N) bytes in dsPIC30F6011A/6013A, and (2048 –
N) bytes in dsPIC30F6010A/6012A/6014A/6015]
where N = Number of bytes of Data EEPROM reserved for Boot Sector.
TABLE 5-7:
CONFIGURATION BITS DESCRIPTION (CONTINUED)
Bit Field
Register
Description
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| DSPIC30F2012A20E/ML | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:High-Performance, 16-Bit Digital Signal Controllers |
| DSPIC30F2012A-20E/ML | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:High-Performance, 16-Bit Digital Signal Controllers |
| DSPIC30F2012A20E/P | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:High-Performance, 16-Bit Digital Signal Controllers |
| DSPIC30F2012A-20E/P | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:High-Performance, 16-Bit Digital Signal Controllers |
| DSPIC30F2012A20E/SO | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:High-Performance, 16-Bit Digital Signal Controllers |
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