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參數(shù)資料
| 型號： | DSPIC30F2012-30I/SP |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 35/66頁 |
| 文件大小： | 0K |
| 描述： | IC DSPIC MCU/DSP 12K 28DIP |
| 產(chǎn)品培訓(xùn)模塊： | Serial Communications using dsPIC30F I2C Serial Communications using dsPIC30F SPI Serial Communications using dsPIC30F UART dsPIC30F 12 bit ADC - Part 2 dsPIC30F Addressing Modes - Part 1 dsPIC30F Architecture - Part 1 dsPIC30F DSP Engine & ALU dsPIC30F Interrupts dsPIC30F Motor Control PWM dsPIC Timers Asynchronous Stimulus dsPIC30F Addressing Modes - Part 2 dsPIC30F Architecture - Part 2 dsPIC30F 12-bit ADC Part 1 |
| 標(biāo)準(zhǔn)包裝： | 15 |
| 系列： | dsPIC™ 30F |
| 核心處理器： | dsPIC |
| 芯體尺寸： | 16-位 |
| 速度： | 30 MIP |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 20 |
| 程序存儲器容量： | 12KB（4K x 24） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.5 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 10x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-DIP（0.300"，7.62mm） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 650 (CN2011-ZH PDF) |
| 配用： | DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE |
| 其它名稱： | DSPIC30F201230ISP |
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dsPIC30F Flash Programming Specification
DS70102K-page 40
2010 Microchip Technology Inc.
11.6
Erasing Program Memory in
Low-Voltage Systems
The procedure for erasing program memory (all code
memory and data memory) in low-voltage systems
(with VDD between 2.5 volts and 4.5 volts) is quite
different than the procedure for erasing program
memory in normal-voltage systems. Instead of using a
Bulk Erase operation, each region of memory must be
individually erased by row. Namely, all of the code
memory, executive memory and data memory must be
erased one row at a time. This procedure is detailed in
Due to security restrictions, the FBS, FSS and FGS
register cannot be erased in low-voltage systems.
Once any bits in the FGS register are programmed to
‘0’, they can only be set back to ‘1’ by performing a Bulk
Erase in a normal-voltage system. Alternatively, a Seg-
ment Erase operation can be performed instead of a
Bulk Erase.
Normal-voltage systems can also be used to erase
program memory as shown in Table 11-5. However,
since this method is more time-consuming and does
not clear the code-protect bits, it is not recommended.
Note:
Program memory must be erased before
writing any data to program memory.
TABLE 11-5:
SERIAL INSTRUCTION EXECUTION FOR ERASING PROGRAM MEMORY
(EITHER IN LOW-VOLTAGE OR NORMAL-VOLTAGE SYSTEMS)
Command
(Binary)
Data
(Hexadecimal)
Description
Step 1: Exit the Reset vector.
0000
040100
000000
GOTO 0x100
NOP
Step 2: Initialize NVMADR and NVMADRU to erase code memory and initialize W7 for row address updates.
0000
EB0300
883B16
883B26
200407
CLR
W6
MOV
W6, NVMADR
MOV
W6, NVMADRU
MOV
#0x40, W7
Step 3: Set NVMCON to erase 1 row of code memory.
0000
24071A
883B0A
MOV
#0x4071, W10
MOV
W10, NVMCON
Step 4: Unlock the NVMCON to erase 1 row of code memory.
0000
200558
883B38
200AA9
883B39
MOV
#0x55, W8
MOV
W8, NVMKEY
MOV
#0xAA, W9
MOV
W9, NVMKEY
Step 5: Initiate the erase cycle.
0000
—
0000
A8E761
000000
—
000000
A9E761
000000
BSET NVMCON, #WR
NOP
Externally time ‘P13a’ ms (see Section 13.0 “AC/DC Characteristics and
NOP
BCLR NVMCON, #WR
NOP
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