參數(shù)資料
型號： DSP56F807
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： 16-bit Hybrid Controller(16位混合控制器)
中文描述： 16位混合控制器（16位混合控制器）
文件頁數(shù)： 11/52頁
文件大?。?/td> 1124K
代理商： DSP56F807
GPIO Signals
56F807 Technical Data
11
2.6 GPIO Signals
2.7 Pulse Width Modulator (PWM) Signals
Table 12. Pulse Width Modulator (PWMA and PWMB) Signals
1
RESET
Input
(Schmitt)
Input
Reset
—This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and
placed in the Reset state. A Schmitt trigger input is used for
noise immunity. When the RESET pin is deasserted, the initial
chip operating mode is latched from the EXTBOOT pin. The
internal reset signal will be deasserted synchronous with the
internal clocks, after a fixed number of internal clocks.
To ensure complete hardware reset, RESET and TRST should
be asserted together. The only exception occurs in a
debugging environment when a hardware device reset is
required and it is necessary not to reset the OnCE/JTAG
module. In this case, assert RESET, but do not assert TRST.
1
EXTBOOT
Input
(Schmitt)
Input
External Boot
—This input is tied to V
DD
to force device to boot
from off-chip memory. Otherwise, it is tied to VSS.
Table 11. Dedicated General Purpose Input/Output (GPIO) Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
8
GPIOB0-G
PIOB7
Input
or
Output
Input
Port B GPIO
—These eight pins are dedicated General
Purpose I/O (GPIO) pins that can individually be programmed
as input or output pins.
After reset, the default state is GPIO input.
6
GPIOD0-G
PIOD5
Input
or
Output
Input
Port D GPIO
—These six pins are dedicated GPIO pins that
can individually be programmed as an input or output pins.
After reset, the default state is GPIO input.
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
6
PWMA0-5
Output
Tri- stated
PWMA0-5
— Six PWMA output pins.
3
ISA0-2
Input
(Schmitt)
Input
ISA0-2
— These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMA.
4
FAULTA0-3
Input
(Schmitt)
Input
FAULTA0-3
— These Fault input pins are used for disabling
selected PWMA outputs in cases where fault conditions
originate off-chip.
6
PWMB0-5
Output
Tri- stated
PWMB0-5
— Six PWMB output pins.
Table 10. Interrupt and Program Control Signals (Continued)
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料
PDF描述
DSP56F826BU80 16-bit Digital Signal Controllers
DSP56F826BU80E 16-bit Digital Signal Controllers
DSP56F826E 16-bit Digital Signal Controllers
DSP56F826 16-bit Hybrid Controller(16位混合控制器)
DSP56F827E 16-bit Digital Signal Controllers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56F807EVM 功能描述:開發(fā)板和工具包 - 其他處理器 Evaluation Kit For DSP56F807 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
DSP56F807EVMUM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F807 Evaluation Module Hardware User＇s Manual
DSP56F807PB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F807 16-Bit Hybrid Controller Product Brief
DSP56F807PY80 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 80Mhz/ 40MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
DSP56F807PY80E 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 80Mhz/40MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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