參數(shù)資料
型號: DSP56857BUE
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 42/53頁
文件大小: 680K
代理商: DSP56857BUE
56857 Technical Data, Rev. 6
42
Freescale Semiconductor
Figure 4-28 RXD Pulse Width
Figure 4-29 TXD Pulse Width
4.12 JTAG Timing
Table 4-14 JTAG Timing
1, 3
Operating Conditions: V
SS
= V
SSIO
= V
SSA
= 0 V, V
DD
= 1.62-1.98V, V
DDIO
= V
DDA
=
3.0–3.6V, T
A
= –40
°
to +120
°
C, C
L
50pF, f
op
= 120MHz
1.
operation, T = 8.33ns.
2.
TCK frequency of operation must be less than 1/4 the processor rate.
3.
Parameters listed are guaranteed by design.
Timing is both wait state and frequency dependent. For the values listed, T = clock cycle. For 120MHz
Characteristic
Symbol
Min
Max
Unit
TCK frequency of operation
2
f
OP
DC
30
MHz
TCK cycle time
t
CY
33.3
ns
TCK clock pulse width
t
PW
16.6
ns
TMS, TDI data setup time
t
DS
3
ns
TMS, TDI data hold time
t
DH
3
ns
TCK low to TDO data valid
t
DV
12
ns
TCK low to TDO tri-state
t
TS
10
ns
TRST assertion time
t
TRST
35
ns
DE assertion time
t
DE
4T
ns
RXD
SCI receive
data pin
(Input)
RXD
PW
TXD
SCI receive
data pin
(Input)
TXD
PW
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