- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377001 > DSP56857BUE (飛思卡爾半導體(中國)有限公司) 16-bit Digital Signal Controllers PDF資料下載
參數(shù)資料
| 型號： | DSP56857BUE |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號控制器 |
| 文件頁數(shù)： | 11/53頁 |
| 文件大小： | 680K |
| 代理商： | DSP56857BUE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁
Introduction
56857 Technical Data, Rev. 6
Freescale Semiconductor
11
18
V
SSA
V
SSA
Analog Ground (V
SSA
)
—This pin supplies an analog ground.
19
V
SSA
55
CS0
GPIOA0
Output
Input
/Output
External Chip Select (CS0)
—This pin is used as a dedicated GPIO.
Port A GPIO (0)
—This pin is a General Purpose I/O (GPIO) pin when not
configured for host port usage.
56
CS1
GPIOA1
Output
Input
/Output
External Chip Select (CS1)
—This pin is used as a dedicated GPIO
.
Port A GPIO (1)
—This pin is a General Purpose I/O (GPIO) pin when not
configured for host port usage.
57
CS2
GPIOA2
Output
Input
/Output
External Chip Select (CS2)
—This pin is used as a dedicated GPIO.
Port A GPIO (2)
—This pin is a General Purpose I/O (GPIO) pin when not
configured for host port usage.
58
CS3
GPIOA3
Output
Input
/Output
External Chip Select (CS3)
—This pin is used as a dedicated GPIO
.
Port A GPIO (3)
—This pin is a General Purpose I/O (GPIO) pin when not
configured for host port usage.
22
HD0
GPIOB0
Input
Input/Output
Host Address (HD0)—
This input provides the address selection for HI
registers.
This pin is disconnected internally.
Port B GPIO (0)
—This pin is a General Purpose I/O (GPIO) pin when not
configured for host port usage.
23
HD1
GPIOB1
Input
Input/Output
Host Address (HD1)—
This input provides the address selection for HI
registers.
This pin is disconnected internally.
Port B GPIO (1)
—This pin is a General Purpose I/O (GPIO) pins when
not configured for host port usage.
24
HD2
GPIOB2
Input
Input/Output
Host Address (HD2)—
This input provides the address selection for HI
registers.
This pin is disconnected internally.
Port B GPIO (2)
—This pin is a General Purpose I/O (GPIO) pins when
not configured for host port usage.
Table 3-1 56857 Signal and Package Information for the 100-pin LQFP (Continued)
Pin No.
Signal Name
Type
Description
相關PDF資料 |
PDF描述 |
|---|---|
| DSP56857E | 16-bit Digital Signal Controllers |
| DSP56858E | 16-bit Digital Signal Controllers |
| DSP56858FV120 | 16-bit Digital Signal Controllers |
| DSP56858FVE | 16-bit Digital Signal Controllers |
| DSP56858VF120 | 16-bit Digital Signal Controllers |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56857E | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56857PB | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:120 MIPS Hybrid Processor |
| DSP56858 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56858E | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56858EVM | 制造商:Freescale Semiconductor 功能描述:Microprocessor Support IC For Use With:D |
發(fā)布緊急采購，3分鐘左右您將得到回復。