參數(shù)資料
型號(hào): DSP56854FGE
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 8/60頁(yè)
文件大?。?/td> 0K
描述: IC DSP 16BIT 120MHZ 128-LQFP
標(biāo)準(zhǔn)包裝: 72
系列: 568xx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 120MHz
連通性: EBI/EMI,SCI,SPI,SSI
外圍設(shè)備: DMA,POR,WDT
輸入/輸出數(shù): 41
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類(lèi)型: SRAM
RAM 容量: 16K x 16
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.98 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 128-LQFP
包裝: 托盤(pán)
56854 Technical Data, Rev. 6
16
Freescale Semiconductor
85
HRWB
HRD
GPIOB11
Input
Input
Input/Output
Host Read/Write (HRWB)—When the HI08 is programmed to
interface to a single-data-strobe host bus and the HI function is
selected, this signal is the Read/Write input.
These pins are disconnected internally.
Host Read Data (HRD)—This signal is the Read Data input when
the HI08 is programmed to interface to a double-data-strobe host
bus and the HI function is selected.
Port B GPIO (11)—This pin is a General Purpose I/O (GPIO) pin
when not configured for host port usage.
103
HDS
HWR
GPIOB12
Input
Input
Input/Output
Host Data Strobe (HDS)—When the HI08 is programmed to
interface to a single-data-strobe host bus and the HI function is
selected, this input enables a data transfer on the HI when HCS is
asserted.
These pins are disconnected internally.
Host Write Enable (HWR)—This signal is the Write Data input
when the HI08 is programmed to interface to a double-data-strobe
host bus and the HI function is selected.
Port B GPIO (12)—This pin is a General Purpose I/O (GPIO) pin
when not configured for host port usage.
104
HCS
GPIOB13
Input
Input/Output
Host Chip Select (HCS)—This input is the chip select input for the
Host Interface.
These pins are disconnected internally.
Port B GPIO (13)—This pin is a General Purpose I/O (GPIO) pin
when not configured for host port usage.
105
HREQ
HTRQ
GPIOB14
Open Drain
Output
Open Drain
Output
Input/Output
Host Request (HREQ)—When the HI08 is programmed for
HRMS=0 functionality (typically used on a single-data-strobe bus),
this open drain output is used by the HI to request service from the
host processor. The HREQ may be connected to an interrupt
request pin of a host processor, a transfer request of a DMA
controller, or a control input of external circuitry.
These pins are disconnected internally.
Transmit Host Request (HTRQ)—This signal is the Transmit Host
Request output when the HI08 is programmed for HRMS=1
functionality and is typically used on a double-data-strobe bus.
Port B GPIO (14)—This pin is a General Purpose I/O (GPIO) pin
when not configured for host port usage.
Table 3-1. 56854 Signal and Package Information for the 128-pin LQFP (Continued)
Pin No.
Signal Name
Type
Description
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