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參數(shù)資料
| 型號： | DS3252+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 67/71頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU DS3/E3/STS-1 144-CSBGA |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 160 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 2/2 |
| 規(guī)程： | IEEE 1149.1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-BGA，CSPBGA |
| 供應商設備封裝： | 144-TECSBGA（13x13） |
| 包裝： | 托盤 |
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DS3251/DS3252/DS3253/DS3254
7 of 71
2. DETAILED DESCRIPTION
The DS3251 (single), DS3252 (dual), DS3253 (triple), and DS3254 (quad) LIUs perform the functions necessary
for interfacing at the physical layer to DS3, E3, or STS-1 lines. Each LIU has independent receive and transmit
paths and a built-in jitter attenuator. The receiver performs clock and data recovery from a B3ZS- or HDB3-coded
alternate mark inversion (AMI) signal and monitors for loss of the incoming signal. The receiver optionally performs
B3ZS/HDB3 decoding and outputs the recovered data in either binary or bipolar format. The transmitter accepts
data in either binary or bipolar format, optionally performs B3ZS/HDB3 encoding, and drives standard pulse-shape
waveforms onto 75
coaxial cable. The jitter attenuator can be mapped into the receiver data path, mapped into
the transmitter data path, or be disabled. An on-chip clock adapter generates all line-rate clocks from a single input
clock. Control interface options include 8-bit parallel, SPI
TM, and hardware mode. The DS325x LIUs conform to the
telecommunications standards listed in Table 1-A. Figure 2-1 shows the external components required for proper
operation.
Shorthand Notations. The notation “DS325x” throughout this data sheet refers to either the DS3251, DS3252,
DS3253, or DS3254. This data sheet is the specification for all four devices. The LIUs on the DS325x devices are
identical. For brevity, this document uses the pin name and register name shorthand “NAMEn,” where “n” stands in
place of the LIU port number. For example, on the DS3254 quad LIU, TCLKn is shorthand notation for pins TCLK1,
TCLK2, TCLK3, and TCLK4 on LIU ports 1, 2, 3, and 4, respectively. This document also uses generic pin and
register names such as TCLK (without a number suffix) when describing LIU operation. When working with a
specific LIU on the DS325x devices, generic names like TCLK should be converted to actual pin names, such as
TCLK1.
Figure 2-1. External Connections
3. APPLICATION EXAMPLE
Figure 3-1. 4-Port Unchannelized DS3/E3 Card
SPI is a trademark of Motorola, Inc.
DS3144
QUAD
DS3/E3
FRAMER
BACKPLANE
DS3254
QUAD
DS3/E3/STS-1
LIU
1:2ct
0.05
F
(optional)
TRANSMIT
RECEIVE
TXP
TXN
RXP
RXN
0.01
F
3.3V
POWER
PLANE
GROUND
PLANE
VDD
EACH LIU
0.1
F
1
F
330
(1%)
330
(1%)
0.01
F
0.1
F
1
F
0.01
F
0.1
F
1
F
VDD
VSS
Dallas
Semiconductor
DS325x
0.05
F
(optional)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3252+ | 功能描述:網(wǎng)絡控制器與處理器 IC Dual DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3252A3 | 功能描述:網(wǎng)絡控制器與處理器 IC Dual DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3252N | 功能描述:網(wǎng)絡控制器與處理器 IC Dual DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3252N+ | 功能描述:網(wǎng)絡控制器與處理器 IC Dual DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3252NA3 | 制造商:Maxim Integrated Products 功能描述:DS3252N REV A3 - Rail/Tube |
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