- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385273 > DS3234 (Maxim Integrated Products, Inc.) Extremely Accurate SPI Bus RTC with Integrated Crystal and SRAM PDF資料下載
參數(shù)資料
| 型號： | DS3234 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Extremely Accurate SPI Bus RTC with Integrated Crystal and SRAM |
| 中文描述： | 高精度、SPI總線RTC，集成晶體和SRAM |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 328K |
| 代理商： | DS3234 |
D
Extremely Accurate SPI Bus RTC with
Integrated Crystal and SRAM
____________________________________________________________________
11
Real-Time Clock
With the clock source from the TCXO, the RTC provides
seconds, minutes, hours, day, date, month, and year
information. The date at the end of the month is automati-
cally adjusted for months with fewer than 31 days, includ-
ing corrections for leap year. The clock operates in either
the 24-hour or 12-hour format with an
AM
/PM indicator.
The clock provides two programmable time-of-day
alarms and a programmable square-wave output. The
INT
/SQW pin either generates an interrupt due to alarm
condition or outputs a square-wave signal and the
selection is controlled by the bit INTCN.
SRAM
The DS3234 provides 256 bytes of general-purpose bat-
tery-backed read/write memory. The SRAM can be writ-
ten or read whenever V
CC
is above either V
PF
or V
BAT
.
Address Map
Figure 1 shows the address map for the DS3234 time-
keeping registers. During a multibyte access, when the
address pointer reaches the end of the register space
(13h read, 93h write), it wraps around to the beginning
(00h read, 80h write). The DS3234 does not respond to a
read or write to any reserved address, and the internal
address pointer does not increment. Address pointer
operation when accessing the 256-byte SRAM data is
covered in the description of the SRAM address and data
registers. On the falling edge of
CS
, or during a multibyte
access when the address pointer increments to location
00h, the current time is transferred to a second set of reg-
isters. The time information is read from these secondary
registers, while the internal clock registers continue to
increment normally. If the time and date registers are
read using a multibyte read, this eliminates the need to
reread the registers in case the main registers update
during a read.
SPI Interface
The DS3234 operates as a slave device on the SPI seri-
al bus. Access is obtained by selecting the part by the
CS
pin and clocking data into/out of the part using the
SCLK and DIN/DOUT pins. Multiple byte transfers are
supported within one
CS
low period. The SPI on the
DS3234 interface is accessible whenever V
CC
is above
either V
BAT
or V
PF
.
Clock and Calendar
The time and calendar information is obtained by read-
ing the appropriate register bytes. Figure 1 illustrates
the RTC registers. The time and calendar data are set
or initialized by writing the appropriate register bytes.
The contents of the time and calendar registers are in
binary-coded decimal (BCD) format. The DS3234 can
be run in either 12-hour or 24-hour mode. Bit 6 of the
hours register is defined as the 12- or 24-hour mode
select bit. When high, 12-hour mode is selected. In 12-
hour mode, bit 5 is the
AM
/PM bit with logic-high being
PM. In 24-hour mode, bit 5 is the second 10-hour bit
(20–23 hours). The century bit (bit 7 of the month regis-
ter) is toggled when the years register overflows from
99 to 00.
The day-of-week register increments at midnight.
Values that correspond to the day of week are user-
defined but must be sequential (i.e., if 1 equals
Sunday, then 2 equals Monday, and so on). Illogical
time and date entries result in undefined operation.
When reading or writing the time and date registers, sec-
ondary (user) buffers are used to prevent errors when the
internal registers update. When reading the time and date
registers, the user buffers are synchronized to the internal
registers on the falling edge of
CS
or and when the regis-
ter pointer rolls over to zero. The time information is read
from these secondary registers, while the clock continues
to run. This eliminates the need to reread the registers in
case the main registers update during a read.
The countdown chain is reset whenever the seconds
register is written. Write transfers occur on the acknowl-
edge from the DS3234. Once the countdown chain is
reset, to avoid rollover issues the remaining time and
date registers must be written within 1 second. The 1Hz
square-wave output, if enabled, transitions high 500ms
after the seconds data transfer.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS3234S | Extremely Accurate SPI Bus RTC with Integrated Crystal and SRAM |
| DS3234SN | Extremely Accurate SPI Bus RTC with Integrated Crystal and SRAM |
| DS33Z11 | Ethernet Mapper |
| DS33ZH11 | Ethernet Mapper |
| DS3803 | 1024K Flexible NV SRAM SIMM(1024K靈活的非易失性SRAM SIMM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3234_07 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Extremely Accurate SPI Bus RTC with Integrated Crystal and SRAM |
| DS3234_08 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Extremely Accurate SPI Bus RTC with Integrated Crystal and SRAM |
| DS3234_10 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Extremely Accurate SPI Bus RTC with Integrated Crystal and SRAM |
| DS3234_BREAKOUT_ | 制造商:MCM 功能描述:DS3234 BREAKOUT BOARD 制造商:PREMIER FARNELL 功能描述:DS3234 BREAKOUT BOARD |
| DS3234_BREAKOUT_B34 | 制造商:Distributed By MCM 功能描述:DS3234 Real Time Clock Breakout Board |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。