參數(shù)資料
型號(hào)： DS26524
廠商： Maxim Integrated Products, Inc.
英文描述： Quad T1/E1/J1 Transceiver
中文描述： 四路T1/E1/J1收發(fā)器
文件頁(yè)數(shù)： 21/273頁(yè)
文件大?。?/td> 1212K
代理商： DS26524
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DS26524 Quad T1/E1/J1 Transceiver
21 of 273
NAME
PIN
TYPE
FUNCTION
RECEIVE FRAMER
RSER1
E5
RSER2
D6
RSER3
N4
RSER4
N6
O
Received Serial Data.
Received NRZ serial data. Updated on rising edges of
RCLK when the receive-side elastic store is disabled. Updated on the rising edges
of RSYSCLK when the receive-side elastic store is enabled.
When IBO mode is used, the RSER pins can output data for multiple framers. The
RSER data is synchronous to RSYSCLK. This is described in Section
8.8.2
.
RCLK1
RCLK2
RCLK3
RCLK4
F4
G4
L4
M4
O
Receive Clock.
A 1.544MHz (T1) or 2.048MHz (E1) clock that is used to clock
data through the receive-side framer. This clock is recovered from the signal at
RTIP and RRING. RSER data is output on the rising edge of RCLK. RCLK is used
to output RSER when the elastic store is not enabled or IBO is not used. When the
elastic store is enabled or IBO is used, the RSER is clocked by RSYSCLK.
Receive System Clock.
1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, or
16.384MHz receive backplane clock. Only used when the receive-side elastic store
function is enabled. Should be tied low in applications that do not use the receive-
side elastic store. Multiple of 2.048MHz is expected when the IBO mode is used.
Note that RSYSCLK is used for all eight transceivers.
Receive Synchronization.
If the receive-side elastic store is enabled, then this
signal is used to input a frame or multiframe boundary pulse. If set to output frame
boundaries, then RSYNC can be programmed to output double-wide pulses on
signaling frames in T1 mode. In E1 mode, RSYNC out can be used to indicate
CAS and CRC-4 multiframe. The DS26524 can accept H.100-compatible
synchronization signal. The default direction of this pin at power-up is input, as
determined by the RSIO control bit in the
RIOCR
.2 register.
Receive Multiframe/Frame Synchronization.
A dual function pin to indicate
frame or multiframe synchronization. RFSYNC is an extracted 8kHz pulse, one
RCLK wide that identifies frame boundaries. RMSYNC is an extracted pulse, one
RCLK wide (elastic store disabled) or one RSYSCLK wide (elastic store enabled),
that identifies multiframe boundaries. When the receive elastic store is enabled,
the RMSYNC signal indicates the multiframe sync on the system (backplane) side
of the elastic store. In E1 mode, this pin can indicate either the CRC-4 or CAS
multiframe as determined by the RSMS2 control bit in the Receive I/O
Configuration register (
RIOCR
.1).
RSYSCLK
L12
I
RSYNC1
A4
RSYNC2
B6
RSYNC2
N5
RSYNC2
T6
I/O
RMSYNC1/
RFSYNC1
RMSYNC2/
RFSYNC2
RMSYNC3/
RFSYNC3
RMSYNC4/
RFSYNC4
RSIG1
RSIG2
RSIG3
RSIG4
AL/
RSIGF/
FLOS1
AL/
RSIGF/
FLOS2
AL/
RSIGF/
FLOS3
AL/
RSIGF/
FLOS4
RLF/
LTC1
RLF/
LTC2
RLF/
LTC3
RLF/
LTC4
C4
C6
P4
P6
O
D4
E6
M5
R5
O
Receive Signaling.
Outputs signaling bits in a PCM format. Updated on rising
edges of RCLK when the receive-side elastic store is disabled. Updated on the
rising edges of RSYSCLK when the receive-side elastic store is enabled.
C3
F3
L3
P3
O
Analog Loss/Receive-Signaling Freeze/Framer LOS.
Analog LOS reflects the
LOS (loss of signal) detected by the LIU front-end and framer LOS is LOS
detection by the corresponding framer; the same pins can reflect receive-signaling
freeze indications. This selection can be made by settings in the Global
Transceiver Clock Control register (
GTCCR
).
If framer LOS is selected, this pin can be programmed to toggle high when the
framer detects an LOS condition, or when the signaling data is frozen via either
automatic or manual intervention. The indication is used to alert downstream
equipment of the condition.
D3
E3
M3
N3
O
Receive Loss of Frame/Loss of Transmit Clock.
This pin can be programmed to
either toggle high when the synchronizer is searching for the frame and multiframe,
or to toggle high if the TCLK pin has not been toggled for approximately three clock
periods.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS26524_07 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Quad T1/E1/J1 Transceiver
DS26524DK 功能描述:網(wǎng)絡(luò)開(kāi)發(fā)工具 DS26524 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
DS26524G 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4-Port E1/T1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS26524G+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4-Port E1/T1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS26524GA4 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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