參數(shù)資料
型號: DS26324GNA3+
廠商: Maxim Integrated Products
文件頁數(shù): 64/120頁
文件大?。?/td> 0K
描述: IC LIU E1/T1/J1 3.3V 256-CSBGA
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 90
類型: 線路接口裝置(LIU)
驅動器/接收器數(shù): 16/16
規(guī)程: LIN
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 256-LBGA,CSBGA
供應商設備封裝: 256-CSBGA(17x17)
包裝: 托盤
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
48 of 120
6.1
Register Description
This section contains the detailed register descriptions of each bit. Whenever the variable “n” in italics is used in
any of the register descriptions, it represents 1–16. Note that in the register descriptions, there are duplicate
registers for LIUs 1–8 and LIUs 9–16. There are registers in LIUs 1–8 that do not have a duplicate in the register
set for LIUs 9–16. For these registers, only one address is listed. All other registers list two addresses, one for LIUs
1–8 and one for LIUs 9–16.
6.1.1
Primary Register Bank
The ADDP register must be set to 00h to access this bank.
Register Name:
ID
Register Description:
ID Register
Register Address:
00h
Bit #
7
6
5
4
3
2
1
0
Name
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
Bit 7: Device CODE ID Bit 7 (ID7). This bit is “zero” for short-haul operation.
Bits 6 to 3: Device CODE ID Bits 6 to 3 (ID6 to ID3). These bits tell the user the number of ports the device
contains.
factory for details.
Register Name:
ALBC
Register Description:
Analog Loopback Control
Register Address (LIUs 1–8):
01h
Bit #
7
6
5
4
3
2
1
0
Name
ALBC8
ALBC7
ALBC6
ALBC5
ALBC4
ALBC3
ALBC2
ALBC1
Default
0
Register Address (LIUs 9–16):
21h
Bit #
7
6
5
4
3
2
1
0
Name
ALBC16
ALBC15
ALBC14
ALBC13
ALBC12
ALBC11
ALBC10
ALBC9
Default
0
Bits 7 to 0: Analog Loopback Control Bits Channel n (ALBCn). When this bit is set, LIUn is placed in Analog
Loopback. TTIP and TRING are looped back to RTIP and RRING. The data at RTIP and RRING is ignored. LOS
Detector is still in operation. The jitter attenuator is in use if enabled for the transmitter or receiver.
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