- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9752 > DS26324GNA3+ (Maxim Integrated Products)IC LIU E1/T1/J1 3.3V 256-CSBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | DS26324GNA3+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 42/120頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E1/T1/J1 3.3V 256-CSBGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 16/16 |
| 規(guī)程： | LIN |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-LBGA，CSBGA |
| 供應(yīng)商設(shè)備封裝： | 256-CSBGA（17x17） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁當(dāng)前第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
28 of 120
5.5.3
Peak Detector and Slicer
The slicer determines the polarity and presence of the received data. The output of the slicer is sent to the clock
and data recovery circuitry for extraction of data and clock. The slicer has a built-in peak detector for determination
of the slicing threshold.
5.5.4
Receive Level Indicator
The DS26324 will report the signal strength at RTIP and RRING in increments described in Table 6-17. via register
bits CnRL3–CnRL0 located in the RSL1–4 registers.
5.5.5
Clock and Data Recovery
The resultant E1 or T1 clock derived from the 2.048/1.544 PLL is internally multiplied by 16 via another internal PLL
and fed to the clock recovery system. The clock recovery system uses the clock from the PLL circuit to form a 16
times oversampler, which is used to recover the clock and data. This oversampling technique offers outstanding
performance to meet jitter tolerance specifications.
5.5.6
Loss of Signal
The DS26324 uses both the digital and analog loss-detection method in compliance with the latest ANSI T1.231 for
T1/J1 and ITU-T G.775 or ETS 300 233 for E1 mode of operation.
LOS is detected if the receiver level falls bellow a threshold analog voltage for certain duration. Alternatively, this
can be termed as having received “zeros” for certain duration. The signal level and timing duration are defined in
accordance with the ANSI T1.231, ITU-T G.775, or ETS 300 233 specifications.
The loss detection thresholds are based on cable loss of 18dB for both T1 and E1 modes.
RCLK is replaced by MCLK when the receiver detects a loss of signal. If the AISEL bit is set in the GC register or
the IAISEL bit is set, the RPOS/RNEG data is replaced by AIS. The loss state is exited when the receiver detects a
certain number of ones density at a higher signal level than the loss detection level. The loss detection signal level
and loss reset signal level are defined with a hysteresis to prevent the receiver from bouncing between “LOS” and
“no LOS” states.
Table 5-6 outlines the specifications governing the loss function.
Table 5-6. Loss Criteria ANSI T1.231, ITU-T G.775, and ETS 300 233 Specifications
CRITERIA
STANDARD
T1.231
ITU-T G.775
ETS 300 233
Loss
Detection
Criteria
No pulses are detected for 175
±75 bits.
No pulses are detected for
duration of 10 to 255 bit
periods.
No pulses are detected for a
duration of 2048 bit periods or
1ms.
Loss Reset
Criteria
Loss is terminated if a duration
of 12.5% ones are detected over
duration of 175 ±75 bits.
Loss is not terminated if 8
consecutive zeros are found if
B8ZS encoding is used. If B8ZS
is not used loss is not
terminated if 100 consecutive
pulses are zero.
The incoming signal has
transitions for duration of 10 to
255 bit periods.
Loss reset criteria is not
defined.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX1070CTC+ | IC ADC 10BIT 1.5MSPS 12-TQFN |
| DS21458N+ | IC LIU QUAD T1/E1/J1 256-CSBGA |
| DS3152+ | IC LIU DS3/E3/STS-1 144-CSBGA |
| VI-25H-IU-F2 | CONVERTER MOD DC/DC 52V 200W |
| DS26324GN+T&R | IC LIU E1/T1/J1 3.3V 256-CSBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS26324GNA3+ | 功能描述:電信集成電路 3.3V E1/T1/J1 16Ch Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| DS26324N | 制造商:Maxim Integrated Products 功能描述:DS26324 X16 T1E1J1 LIU S-HAUL IND - Rail/Tube |
| DS26324-W | 功能描述:電信集成電路 RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| DS26334 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, 16-Channel, E1/T1/J1 Shortand Long-Haul Line Interface Unit |
| DS26334_07 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, 16-Channel, E1/T1/J1 Shortand Long-Haul Line Interface Unit |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。