參數(shù)資料
型號(hào): DS26324GN+T&R
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 70/120頁(yè)
文件大?。?/td> 0K
描述: IC LIU E1/T1/J1 3.3V 256-CSBGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 500
類(lèi)型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 16/16
規(guī)程: LIN
電源電壓: 3.135 V ~ 3.465 V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 256-LBGA,CSBGA
供應(yīng)商設(shè)備封裝: 256-CSBGA(17x17)
包裝: 帶卷 (TR)
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DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
53 of 120
Register Name:
BGMC
Register Description:
BERT and G.772 Monitoring Control
Register Address (LIUs 1–8):
0Bh
Bit #
7
6
5
4
3
2
1
0
Name
BERTDIR
BMCKS
BTCKS
GMC3
GMC2
GMC1
GMC0
Default
0
Bit 7: BERT Direction Control Bit (BERTDIR). When this bit is set, the BERT for LIUs 1–8 will be enabled on the
system side of the part (BERT data will come out on RPOS/RNEG and be expected on TPOS/TNEG) for whichever
LIU the BERT is enabled.
Bit 6: BERT MCLK Selection (BMCKS). When the BERT is enabled on the system side (BERTDIR = 1), setting
this bit will select MCLK as the BERT clock unless BTCKS is set. If neither BMCKS nor BTCKS is set, the BERT
will use the recovered clock.
Bit 5: BERT TCLK Selection (BTCKS). When the BERT is enabled on the system side (BERTDIR = 1), setting
this bit selects TCLK as the BERT clock, regardless of the state of the BMCKS bit. If neither BMCKS nor BTCKS is
set, the BERT will use the recovered clock.
Bits 3 to 0: G.772 Monitoring Control (GMC[3:0]). These bits are used to select transmitter or receiver for
nonintrusive monitoring. Receiver 1 is used to monitor Channels 2 to 8 of one receiver from RTIP2–
RTIP8/RRING2–RRING8 or of one transmitter from TTIP2–TTIP8/TRING2–TRING8. See Table 6-9.
Register Address (LIUs 9–16):
2Bh
Bit #
7
6
5
4
3
2
1
0
Name
BERTDIR
BMCKS
BTCKS
GMC3
GMC2
GMC1
GMC0
Default
0
Bit 7: BERT Direction Control Bit (BERTDIR). When this bit is set, the BERT for LIUs 9–16 will be enabled on
the system side of the part (BERT data will come out on RPOS/RNEG and be expected on TPOS/TNEG) for
whichever LIU the BERT is enabled.
Bit 6: BERT MCLK Selection (BMCKS). When the BERT is enabled on the system side (BERTDIR = 1), setting
this bit will select MCLK as the BERT clock unless BTCKS is set. If neither BMCKS nor BTCKS is set, the BERT
will use the recovered clock. If the clock used as the BERT clock is MCLK or the recovered clock, TCLK must be
frequency locked to the BERT clock in order for the BERT to sync.
Bit 5: BERT TCLK Selection (BTCKS). When the BERT is enabled on the system side (BERTDIR = 1), setting
this bit selects TCLK as the BERT clock, regardless of the state of the BMCKS bit. If neither BMCKS nor BTCKS is
set, the BERT will use the recovered clock.
Bits 3 to 0: G.772 Monitoring Control (GMC). These bits are used to select transmitter or receiver for
nonintrusive monitoring. Receiver 9 is used to monitor Channels 10 to 16 of one receiver from RTIP10–
RTIP16/RRING10–RRING16 or of one transmitter from TTIP10–TTIP16/TRING10–TRING16. See Table 6-10.
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