參數(shù)資料
型號(hào): DS26303
廠商: Maxim Integrated Products, Inc.
英文描述: 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
中文描述: 3.3V、E1/T1/J1、短程、8通道線路接口單元
文件頁數(shù): 34/97頁
文件大?。?/td> 966K
代理商: DS26303
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
34 of 97
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7 to 0: Automatic Transmit All-Ones Select Channel
n
(ATAOS
n
)
. When this bit is set an all-ones signal is
sent if a loss of signal is detected for LIU
n
. All-ones signal uses MCLK as the reference clock.
ATAOS
Automatic Transmit All-Ones Select
0Eh
7
6
5
4
3
2
1
0
ATAOS8
0
ATAOS7
0
ATAOS6
0
ATAOS5
0
ATAOS4
0
ATAOS3
0
ATAOS2
0
ATAOS1
0
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Receive Impedance Mode Select (RIMPMS)
. When this bit is set, the internal impedance mode is selected,
so RTIP and RING require no external resistance component. When this mode is selected, the die attach pad on
the bottom of the package should be connected to ground for thermal dissipation. When reset, external impedance
mode is selected so RTIP and RING require external resistance. Note that when in external impedance mode, the
resistance is still adjusted internally for the T1 (100 ), J1 (110 ), and E1(75 ) modes of operation by the template
selected so that only one resistor value is required externally. In E1 (120 ), external impedance mode has no need
for any internal adjustment.
GC
Global Configuration
0Fh
7
6
5
4
3
2
0
1
0
RIMPMS
0
AISEL
0
SCPD
0
CODE
0
JADS
0
JAPS
0
JAE
0
Bit 6: AIS Enable During Loss (AISEL)
. When this bit is set, an AIS is sent to the system side upon detecting an
LOS for each channel. The individual LIU register
IAISEL
settings are ignored when this bit is set. When reset, the
IAISEL
register has control.
Bit 5: Short-Circuit-Protection Disable (SCPD).
If this bit is set, the short-circuit protection is disabled for all the
transmitters. The individual LIU register
ISCPD
settings are ignored when this bit is set. When reset, the
ISCPD
register has control.
Bit 4: Code (CODE).
If this bit is set, AMI encoder/decoder is selected. The
LCS
register settings are ignored when
this bit is set. If reset, the
LCS
register has control.
Bit 3: Jitter Attenuator Depth Select (JADS)
. If this bit is set the jitter attenuator FIFO depth is 128 bits. The
settings in the
IJAFDS
register are ignored if this register is set. If reset, the
IJAFDS
register has control.
Bit 1: Jitter Attenuator Position Select (JAPS).
When the JAPS bit is set high, the JA is in the receive path, and
when it is default or set low, it is in the transmit path. These settings can be changed for an individual LIU by
settings in register
IJAPS
. Note that when bit JAE is set, the settings in register
IJAPS
are ignored.
Bit 0: Jitter Attenuator Enable (JAE).
When this bit is set the JA is enabled. The settings in the
IJAE
register are
ignored if this register is set. If reset, the IJAE register has control.
相關(guān)PDF資料
PDF描述
DS26303G-120 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303G-75 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303GN-120 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303GN-75 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303L-120 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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DS26303G-120 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303G-75 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit