參數(shù)資料
型號： DS26303
廠商： Maxim Integrated Products, Inc.
英文描述： 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
中文描述： 3.3V、E1/T1/J1、短程、8通道線路接口單元
文件頁數(shù)： 13/97頁
文件大?。?/td> 966K
代理商： DS26303
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
13 of 97
PIN
NAME
eLQFP
105
PBGA
C12
TYPE
FUNCTION
RNEG6/CV6
RNEG7/CV7
4
C3
RNEG8/CV8
RCLK1
RCLK2
RCLK3
RCLK4
RCLK5
RCLK6
RCLK7
RCLK8
141
39
32
78
71
110
103
6
143
A3
P1
M1
M14
P14
A14
C14
C1
A1
excessive zeros are reported by driving CVn high for one clock
cycle. If HDB3 or B8ZS is not selected, this pin indicates only
BPVs.
Note: During an RLOS condition the output remains active.
O,
tri-state
Receive Clock for Channel 1 to 8.
The receive data
RPOS/RNEG or RDAT is clocked out on the rising edge of RCLK.
RCLK output can be inverted. If a given receiver is in power-down
mode, the RCLK is high impedance.
MCLK
10
E1
I
Master Clock.
This is an independent free-running clock that can
be a multiple of 2.048MHz ±50ppm for E1 mode or 1.544MHz
±50ppm for T1 mode. The clock selection is available by
MC
bits
MPS0, MPS1, FREQS, and PLLE. A multiple of 2.048MHz can be
internally adapted to 1.544MHz and a multiple of 1.544MHz can
be internally adapted to 2.048MHz. In hardware mode, internal
adaptation is not available so the user must provide 2.048MHz
±50ppm for E1 mode or 1.544MHz ±50ppm for T1 mode.
Loss-of-Signal Output/T1-E1 Clock
RLOS1/TECLK
42
K4
O
RLOS1:
This output goes high when there is no transition on the
received signal over a specified interval. The output goes low
when there is sufficient ones density in the received signal. The
RLOS criteria for assertion and desertion criteria are described in
the
Functional Description
section. The RLOS outputs can be
configured to comply with T1.231, ITU G.775, or ETSI 300 233. In
hardware mode, ETSI 300 233 “RLOS Criteria” is not available.
TECLK:
When enabled by register
MC
, this output becomes a T1-
or E1-programmable clock output. For T1 or E1 frequency
selection, see register
CCR
. This option is not available in
hardware mode.
RLOS2/
RXPROBEA1
RLOS3/
RXPROBEB1
RLOS4/
RXPROBEC1
35
K3
75
K12
68
K11
I/O
Loss-of-Signal Output/Receive Probe
RLOS[2:4]:
See RLOS1 pin description.
RXPROBE A1, B1, C1:
Used in test only.
RLOS5/
scan_do
113
E11
O
Loss-of-Signal Output/Scan Data Output
RLOS5:
See RLOS1 pin description.
scan_do:
Data output during scan.
RLOS6/
scan_di
106
E12
I/O
Loss-of-Signal Output/Scan Data Input
RLOS6:
See RLOS1 pin description.
scan_di:
Data input during scan.
RLOS7/
scan_clk
3
E3
I/O
Loss-of-Signal Output/Scan Clock
RLOS7:
See RLOS1 pin description.
scan_clk:
Clock input during scan.
相關(guān)PDF資料
PDF描述
DS26303G-120 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303G-75 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303GN-120 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303GN-75 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303L-120 3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS26303_07 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303-75DK 功能描述:網(wǎng)絡(luò)開發(fā)工具 3.3V E1/T1/J1 Short Haul Octal LIU RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
DS26303DK 功能描述:網(wǎng)絡(luò)開發(fā)工具 DS26303 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
DS26303G-120 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303G-75 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
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