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參數(shù)資料
| 型號(hào)： | DS2483R+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 11/29頁(yè) |
| 文件大小： | 0K |
| 描述： | IC I2C TO 1WIRE BRIDGE SOT23-6 |
| 產(chǎn)品培訓(xùn)模塊： | Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | * |
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19
Maxim Integrated
DS2483
Single-Channel 1-Wire Master
with Adjustable Timing and Sleep Mode
I2C Interface
General Characteristics
The I2C bus uses a data line (SDA) and a clock signal
(SCL) for communication. Both SDA and SCL are bidi-
rectional lines connected to a positive supply voltage
through a pullup resistor. When there is no communica-
tion, both lines are high. The output stages of devices
connected to the bus must have an open drain or open
collector to perform the wired-AND function. Data on the
I2C bus can be transferred at rates of up to 100kbps in
standard mode and up to 400kbps in fast mode. The
DS2483 works in both modes.
A device that sends data on the bus is defined as a
transmitter, and a device receiving data is defined as a
receiver. The device that controls the communication is
called a master. The devices that are controlled by the
master are slaves. To be individually accessed, each
device must have a slave address that does not conflict
with other devices on the bus.
Data transfers can be initiated only when the bus is not
busy. The master generates the serial clock (SCL), con-
trols the bus access, generates the START and STOP
conditions, and determines the number of data bytes
transferred between START and STOP (Figure 7). Data
is transferred in bytes with the most significant bit being
transmitted first. After each byte follows an acknowledge
bit to allow synchronization between master and slave.
Slave Address
Figure 8 shows the slave address to which the DS2483
responds. The upper 7 bits are programmed at the fac-
tory. Contact the factory for a customized version with a
different address. The slave address is part of the slave
address/control byte. The last bit of the slave address/
control byte (R/W) defines the data direction. When set
to 0, subsequent data flows from master to slave (write
access mode); when set to 1, data flows from slave to
master (read access mode).
Figure 7. I2C Protocol Overview
Figure 8. DS2483 Slave Address
SDA
SCL
IDLE
1–7
89
1–7
89
1–78
9
START
CONDITION
STOP CONDITION
REPEATED START
SLAVE
ADDRESS
R/W
ACK
DATA
ACK/
NACK
DATA
MSB FIRST
MSB
LSB
MSB
LSB
REPEATED IF MORE BYTES
ARE TRANSFERRED
0
A6
MSB
0
A5
1
A4
1
A3
7-BIT SLAVE ADDRESS
0
A2
0
A1
0
A0
R/W
DETERMINES
READ OR WRITE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2484Q+T | 制造商:Maxim Integrated Products 功能描述: |
| DS2484R+T | 制造商:Maxim Integrated Products 功能描述: |
| DS2490 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:USB to 1-Wire Bridge Chip |
| DS2490S | 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| DS2490S+ | 制造商:Maxim Integrated Products 功能描述:USB TO 1-WIRE BRIDGE 24SOIC W - Rail/Tube 制造商:Maxim Integrated Products 功能描述:USB 1-W BRIDGE CHIP 24-SO LF 制造商:Maxim Integrated Products 功能描述:Bulk |
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