參數(shù)資料
型號(hào): DS229N
廠商: DALLAS SEMICONDUCTOR
元件分類: Line Driver or Receiver
英文描述: LINE TRANSCEIVER, PDIP20
封裝: DIP-20
文件頁(yè)數(shù): 20/29頁(yè)
文件大?。?/td> 1710K
代理商: DS229N
MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
27
Maxim Integrated
Acknowledge Bits
Data transfers are acknowledged with an acknowledge
bit (ACK) or a not-acknowledge bit (NACK). Both the
master and the MAX14640/MAX14651 generate ACK
bits. To generate an ACK, pull SDA low before the rising
edge of the ninth clock pulse, and hold it low during the
high period of the ninth clock pulse (see Figure 12). To
generate a NACK, leave SDA high before the rising edge
of the ninth clock pulse, and leave it high for the duration
of the ninth clock pulse. Monitoring for NACK bits allows
for detection of unsuccessful data transfers.
High-ESD Protection
Electrostatic Discharge (ESD)-protection structures are
incorporated on all pins to protect against electrostatic
discharges up to Q2kV Human Body Model (HBM)
encountered during handling and assembly. DP and DM
are further protected against ESD up to Q15kV (HBM)
without damage. The ESD structures withstand high ESD
both in normal operation and when the device is powered
down. After an ESD event, the MAX14640–MAX14644/
MAX14651 continue to function without latchup.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
The MAX14640–MAX14644/MAX14651 require a 1FF
capacitor on both VCC to GND to guarantee full ESD
protection.
Human Body Model
Figure 13 shows the Human Body Model. Figure 14
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest
that is then discharged into the device through a 1.5kI
resistor.
Figure 12. Acknowledge
Figure 13. Human Body ESD Test Model
Figure 14. Human Body Current Waveform
NOT ACKNOWLEDGE
ACKNOWLEDGE
12
89
SDA
SCL
S
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
CS
100pF
RC
1M
RD
1.5k
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
100%
36.8%
tRL
TIME
tDL
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
Ir
0
IPEAK (AMPS)
90%
10%
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PDF描述
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