參數(shù)資料
型號(hào): DS229N
廠商: DALLAS SEMICONDUCTOR
元件分類: Line Driver or Receiver
英文描述: LINE TRANSCEIVER, PDIP20
封裝: DIP-20
文件頁(yè)數(shù): 16/29頁(yè)
文件大小: 1710K
代理商: DS229N
MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
23
Maxim Integrated
Applications Information
I2C Interface
The MAX14640/MAX14651 contain an I2C-compatible
interface for data communication with a host controller
(SCL and SDA). The interface supports a clock frequen-
cy of up to 400kHz. SCL and SDA require pullup resistors
that are connected to a positive supply.
START, STOP, and Repeated START Conditions
When writing to the MAX14640/MAX14651 using I2C,
the master sends a START condition (S) followed by the
MAX14640/MAX14651 I2C address. After the address,
the master sends the register address of the register that
is to be programmed. The master then ends communica-
tion by issuing a STOP condition (P) to relinquish control
of the bus, or a Repeated START condition (Sr) to com-
municate to another I2C slave. See Figure 7.
Slave Address
The MAX14640 and MAX14651 are the I2C versions that
have different slave addresses (Table 8). Set the read/
write bit high to configure the MAX14640/MAX14651 to
read mode. Set the read/write bit low to configure the
MAX14640/MAX14651 to write mode. The address is the
first byte of information sent to the MAX14640/MAX14651
after the START condition.
Bit Transfer
One data bit is transferred on the rising edge of each
SCL clock cycle. The data on SDA must remain stable
during the high period of the SCL clock pulse. Changes
in SDA while SCL is high and stable are considered
control signals (see the START, STOP, and Repeated
START Conditions section). Both SDA and SCL remain
high when the bus is not active.
Figure 7. I2C START, STOP, and Repeated START Conditions
Table 8. I2C Slave Addresses
ADDRESS FORMAT
MAX14640
MAX14651
HEX
BINARY
HEX
BINARY
7-Bit Slave ID
0x35
011 0101
0x15
001 0101
Write Address
0x6A
0110 1010
0x2A
0010 1010
Read Address
0x6B
0110 1011
0x2B
0010 1011
SCL
SDA
SSrP
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