參數(shù)資料
型號: DS21Q50L-W+
廠商: Maxim Integrated Products
文件頁數(shù): 62/87頁
文件大小: 0K
描述: TXRX E1 QUAD CLK/DATA 100LQFP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 90
功能: 收發(fā)器
接口: E1
電路數(shù): 4
電源電壓: 3.14 V ~ 3.47 V
電流 - 電源: 230mA
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
包括: *
其它名稱: 90-21Q50+LW0
DS21Q50
65 of 87
Transmit and receive CMI is enabled through OUTAC.7. When this register bit is set, the TTIP pin
outputs CMI-coded data at normal TTL-type levels. This signal can be used to directly drive an optical
interface. When CMI is enabled, the user can also use HDB3 coding.
When this register bit is set, the RTIP pin becomes a unipolar CMI input. The CMI signal is processed to
extract and align the clock with data. The BPV counts CVs (code violations) in the CMI signal. CVs are
defined as consecutive ones of the same polarity as shown in Figure 17-2. If HDB3 precoding is enabled,
then the CVs generated by HDB3 are not counted as errors.
Figure 17-2. CMI Code Violation Example
0
1
11
00
1
CLOCK
DATA
CMI
CODE VIOLATION
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