參數(shù)資料
型號(hào): DS21Q44TN
英文描述: MICROSWITCH, SPDT, SIM ROLLER LEVER; Current, contact AC:5A; Force, operating:91.75gf; Travel, pre:16.0mm; Centres, fixing LxW:22.2mm; Temp, op. max:120(degree C); Temp, op. min:-40(degree C); Length / Height, external:9.25mm; Width, RoHS Compliant: Yes
中文描述: 增強(qiáng)的四素E1成幀器
文件頁數(shù): 17/105頁
文件大小: 620K
代理商: DS21Q44TN
DS21Q44
17 of 105
Signal Name:
Signal Description:
Signal Type:
Sampled on the falling edge of RCLK for data to be clocked through the receive side framer. RPOS and
RNEG can be tied together for an NRZ interface. Connecting RPOS to RNEG disables the bipolar
violation monitoring circuitry.
RPOS
Receive Positive Data Input
Input
Signal Name:
Signal Description:
Signal Type:
Sampled on the falling edge of RCLK for data to be clocked through the receive side framer. RPOS and
RNEG can be tied together for an NRZ interface. Connecting RPOS to RNEG disables the bipolar
violation monitoring circuitry.
RNEG
Receive Negative Data Input
Input
PARALLEL CONTROL PORT PINS
Signal Name:
INT*
Signal Description:
Interrupt
Signal Type:
Output
Flags host controller during conditions and change of conditions defined in the Status Registers 1 and 2
and the FDL Status Register. Active low, open drain output.
Signal Name:
Signal Description:
Signal Type:
Set low to select DS21Q44 feature set. Set high to select DS21Q43 emulation.
FMS
Framer Mode Select
Input
Signal Name:
Signal Description:
Signal Type:
Set low to select non–multiplexed bus operation. Set high to select multiplexed bus operation.
MUX
Bus Operation
Input
Signal Name:
Signal Description:
Signal Type:
In non–multiplexed bus operation (MUX = 0), serves as the data bus. In multiplexed bus operation (MUX
= 1), serves as a 8–bit multiplexed address / data bus.
D0 TO D7 / AD0 TO AD7
Data Bus or Address/Data Bus
Input /Output
Signal Name:
Signal Description:
Signal Type:
In non–multiplexed bus operation (MUX = 0), serves as the address bus. In multiplexed bus operation
(MUX = 1), these pins are not used and should be tied low.
A0 TO A5, A7
Address Bus
Input
Signal Name:
Signal Description:
Signal Type:
In non–multiplexed bus operation (MUX = 0), serves as address bit 6. In multiplexed bus operation
(MUX = 1), serves to demultiplex the bus on a positive–going edge.
ALE (AS) / A6
Address Latch Enable (Address Strobe) or A6
Input
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