參數(shù)資料
型號(hào): DS21FT44
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA300
封裝: 27 X 27 MM, 1.27 MM PITCH, MCMBGA-300
文件頁(yè)數(shù): 79/117頁(yè)
文件大小: 691K
代理商: DS21FT44
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)當(dāng)前第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)
DS21FT44/DS21FF44
64 of 117
TCBR1/TCBR2/TCBR3/TCBR4: TRANSMIT CHANNEL BLOCKING REGISTERS
(Address = 22 to 25 Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
TCBR1 (22)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
TCBR2 (23)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
TCBR3 (24)
CH32
CH31
CH30
CH29
CH28
CH27
CH26
CH25
TCBR4 (25)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH1–32
TCBR1.0–4.7
Transmit Channel Blocking Control Bits
0 = force the TCHBLK pin to remain low during this channel
time
1 = force the TCHBLK pin high during this channel time
Note: If CCR3.6 = 1, then a zero in the TCBRs implies that signaling data is to be sourced from TSER
(or TSIG if CCR3.2 = 1) and a one implies that signaling data for that channel is to be sourced from the
Transmit Signaling (TS) registers. See definition below.
TCBR1/TCBR2/TCBR3/TCBR4: DEFINITION WHEN CCR3.6 = 1
(MSB)
(LSB)
CH20
CH4
CH19
CH3
CH18
CH2
CH17*
CH1*
TCBR1 (22)
CH24
CH8
CH23
CH7
CH22
CH6
CH21
CH5
TCBR2 (23)
CH28
CH12
CH27
CH11
CH26
CH10
CH25
CH9
TCBR3 (24)
CH32
CH16
CH31
CH15
CH30
CH14
CH29
CH13
TCBR4 (25)
*CH1 and CH17 should be set to one to allow the internal TS1 register to create the CAS Multiframe Alignment Word and Spare/Remote Alarm
bits.
17.
ELASTIC STORES OPERATION
Each framer in the DS21Q44 contains dual two-frame (512 bits) elastic stores, one for the receive
direction, and one for the transmit direction. These elastic stores have two main purposes. First, they can
be used to rate convert the E1 data stream to 1.544Mbps (or a multiple of 1.544Mbps), which is the T1
rate. Secondly, they can be used to absorb the differences in frequency and phase between the E1 data
stream and an asynchronous (i.e., not frequency locked) backplane clock, which can be 1.544MHz or
2.048MHz. The backplane clock can burst at rates up to 8.192MHz. Both elastic stores contain full
controlled slip capability, which is necessary for this second purpose. Both elastic stores within a framer
are fully independent and no restrictions apply to the sourcing of the various clocks that are applied to
them. The transmit side elastic store can be enabled whether the receive elastic store is enabled or
disabled and vice versa. Also, each elastic store can interface to either a 1.544MHz or 2.048MHz
backplane without regard to the backplane rate the other elastic store is interfacing.
Two mechanisms are available to the user for resetting the elastic stores. The Elastic Store Reset (CCR6.0
and CCR6.1) function forces the elastic stores to a depth of one frame unconditionally. Data is lost during
the reset. The second method, the Elastic Store Align (CCR5.5 and CCR5.6) forces the elastic store depth
to a minimum depth of half a frame only if the current pointer separation is already less then half a frame.
If a realignment occurs data is lost. In both mechanisms, independent resets are provided for both the
receive and transmit elastic stores.
相關(guān)PDF資料
PDF描述
DS21Q352 DATACOM, PCM TRANSCEIVER, PBGA256
DS21Q354 DATACOM, PCM TRANSCEIVER, PBGA256
DS21Q41BT DATACOM, FRAMER, PQFP128
DS21Q42TN DATACOM, FRAMER, PQFP128
DS21Q42T DATACOM, FRAMER, PQFP128
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS21FT44+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4X3 E1 Framer E1 Framer E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21FT44N 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl E1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21FT44N+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl E1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21Q348 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21Q348B 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray