參數(shù)資料
型號： DS2151QB+
廠商： Maxim Integrated Products
文件頁數(shù)： 28/60頁
文件大?。?/td> 0K
描述： IC TXRX T1 1-CHIP 5V LP 44-PLCC
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 26
功能： 單芯片收發(fā)器
接口： T1
電路數(shù)： 1
電源電壓： 4.75 V ~ 5.25 V
電流 - 電源： 65mA
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 44-LCC（J 形引線）
供應商設備封裝： 44-PLCC（16.59x16.59）
包裝： 管件
包括： 警報檢測器和發(fā)生器，CSU 回路代碼發(fā)生器和檢測器，DSX-1和CSU 線路補償發(fā)生器
產(chǎn)品目錄頁面： 1429 (CN2011-ZH PDF)
DS2151Q
34 of 60
9 TRANSMIT TRANSPARENCY AND IDLE REGISTERS
There is a set of seven registers in the DS2151Q that can be used to custom tailor the data that is to be
transmitted onto the T1 line, on a channel-by-channel basis. Each of the 24 T1 channels can be either
forced to be transparent or to have a user defined idle code inserted into them. Each of these special
registers is defined below.
TTR1/TTR2/TTR3: TRANSMIT TRANSPARENCY REGISTERS (Address = 39
to 3B Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
TTR1 (39)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
TTR2 (3A)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
TTR3 (3B)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH24
TTR3.7
Transmit Transparency Registers.
0 = this DS0 channel is not transparent
CH1
TTR1.0
1 = this DS0 channel is transparent
Each of the bit positions in the Transmit Transparency Registers (TTR1/TTR2/TTR3) represents a DS0
channel in the outgoing frame. When these bits are set to a 1, the corresponding channel is transparent (or
clear). If a DS0 is programmed to be clear, no Robbed-Bit signaling will be inserted nor will the channel
have Bit 7 stuffing performed. However, in the D4 framing mode, Bit 2 will be overwritten by a 0 when a
Yellow Alarm is transmitted. Also the user has the option to prevent the TTR registers from determining
which channels are to have Bit 7 stuffing performed. If the TCR2.0 and TCR1.3 bits are set to 1, then all
24 T1 channels will have Bit 7 stuffing performed on them regardless of how the TTR registers are
programmed. In this manner, the TTR registers are only affecting which channels are to have Robbed-Bit
signaling inserted into them. See Figure 14-9 for more details.
TIR1/TIR2/TIR3: TRANSMIT IDLE REGISTERS (Address = 3C to 3E Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
TIR1 (3C)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
TIR2 (3D)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
TIR3 (3E)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH24
TIR3.7
Transmit Idle Registers.
0 = do not insert the Idle Code into this DS0 channel
CH1
TIR1.0
1 = insert the Idle Code into this channel
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2151QB/T&R 制造商:Maxim Integrated Products 功能描述:T1 SINGLE CHIP XCVR REV B T&R - Tape and Reel
DS2151QB/T&R+ 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel
DS2151QB/T&R 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2151QB+ 功能描述:網(wǎng)絡控制器與處理器 IC T1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2151QB+T&R 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel
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