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參數(shù)資料
| 型號： | DS2151Q |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 16/47頁 |
| 文件大小： | 413K |
| 代理商： | DS2151Q |
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MAX1464
Low-Power, Low-Noise Multichannel
Sensor Signal Processor
23
Maxim Integrated
Description:
Perform a 16-bit logical AND operation, bit for bit, on
the contents of the A-register and the contents of the X-
register. Store the 16-bit result back into the A-register.
The previous contents of the A-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is not preserved.
No branching occurs.
No other registers are affected.
ORX
OR Register X with Register A
Op-code:
0011 XXXXBINARY 3Xh
Operation:
A-register
← A-register OR X-register
PC-register
← PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
Description:
Perform a 16-bit logical OR operation, bit for bit, on the
contents of the A-register and the contents of the X-reg-
ister. Store the 16-bit result back into the A-register.
The previous contents of the A-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is not preserved.
No branching occurs.
No other registers are affected.
ADX
ADD Register X to Register A
Op-code:
0100 XXXXBINARY 4Xh
Operation:
A-register
← A-register + X-register
PC-register
← PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
Description:
Perform a 16-bit arithmetic addition of the A-register
and the contents of the X-register. Store the low 16 bits
of the result back into the A-register. Any overflow bit
resulting from the addition operation is lost. The previ-
ous contents of the A-register are overwritten and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is preserved.
No branching occurs.
No other registers are affected.
STX
Store Register X
Op-code:
0101 XXXXBINARY 5Xh
Operation:
X-register
← A-register
PC-register
← PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
Description:
Perform a 16-bit move operation from the A-register into
the X-register. The A-register contents are unchanged.
The previous contents of the X-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is preserved.
No branching occurs.
No other registers are affected.
SLX
Shift Left Register X
Op-code:
0110 XXXXBINARY 6Xh
PC-register
← PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
14
15
13 12
11
10
9
8
7
6
5
4
3
2
1
0
BIT:
14
15
13 12
11
10
9
8
7
6
5
4
3
2
1
0
BIT:
14
15
13 12
11
10
9
8
7
6
5
4
3
2
1
0
BIT:
REGISTER X
Operation when X
≠ 6h:
REGISTER R6
REGISTER M: R4
Operation when X = 6h:
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS229S | LINE TRANSCEIVER, PDSO20 |
| DS232AE | LINE TRANSCEIVER, PDSO20 |
| DS232AR | LINE TRANSCEIVER, PDSO16 |
| DS232AR-N | LINE TRANSCEIVER, PDSO16 |
| DS232AS-N | LINE TRANSCEIVER, PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2151Q/T&R | 制造商:Maxim Integrated Products 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC |
| DS2151Q/T&R | 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| DS2151QB | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2151QB/T&R | 制造商:Maxim Integrated Products 功能描述:T1 SINGLE CHIP XCVR REV B T&R - Tape and Reel |
| DS2151QB/T&R+ | 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel |
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