DS21352/DS21552
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TABLE OF CONTENTS
1.
LIST OF FIGURES .........................................................................................................................5
2.
LIST OF TABLES ...........................................................................................................................6
3.
INTRODUCTION............................................................................................................................7
3.1
FUNCTIONAL DESCRIPTION..............................................................................................8
3.2
DOCUMENT REVISION HISTORY....................................................................................10
4.
PIN DESCRIPTION ......................................................................................................................11
4.1
PIN FUNCTION DESCRIPTION..........................................................................................17
4.1.1 Transmit Side Pins ........................................................................................................17
4.1.2 Receive Side Pins ..........................................................................................................20
4.1.3 Parallel Control Port Pins............................................................................................23
4.1.4 JTAG Test Access Port Pins .........................................................................................25
4.1.5 Interleave Bus Operation Pins......................................................................................25
4.1.6 Line Interface Pins........................................................................................................26
4.1.7 Supply Pins....................................................................................................................27
5.
PARALLEL PORT........................................................................................................................28
5.1
REGISTER MAP ...................................................................................................................28
6.
CONTROL, ID, AND TEST REGISTERS .................................................................................32
6.1
POWER-UP SEQUENCE......................................................................................................32
6.2
DEVICE ID ............................................................................................................................32
6.3
PAYLOAD LOOPBACK.......................................................................................................37
6.4
FRAMER LOOPBACK .........................................................................................................38
6.5
PULSE DENSITY ENFORCER ............................................................................................40
6.6
REMOTE LOOPBACK .........................................................................................................44
7.
STATUS AND INFORMATION REGISTERS..........................................................................45
8.
ERROR COUNT REGISTERS ....................................................................................................52
8.1
LINE CODE VIOLATION COUNT REGISTER (LCVCR) ................................................53
8.2
PATH CODE VIOLATION COUNT REGISTER (PCVCR) ...............................................54
8.3
MULTIFRAMES OUT OF SYNC COUNT REGISTER (MOSCR)....................................55
9.
DSO MONITORING FUNCTION...............................................................................................56