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參數(shù)資料
| 型號： | DS1963S |
| 英文描述： | SHA iButton |
| 中文描述： | SHA iButton |
| 文件頁數(shù)： | 29/37頁 |
| 文件大?。?/td> | 349K |
| 代理商： | DS1963S |
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DS1963S
29 of 37
Overdrive Skip ROM [3Ch]
On a single-drop bus this command can save time by allowing the bus master to access the memory
functions without providing the 64-bit ROM code. Unlike the normal Skip ROM command the Overdrive
Skip ROM sets the DS1963S in the Overdrive Mode (OD = 1). All communication following this
command code has to occur at Overdrive Speed until a reset pulse of minimum 480 μs duration resets all
devices on the bus to regular speed (OD = 0).
When issued on a multidrop bus this command will set all Overdrive-supporting devices into Overdrive
mode. To subsequently address a specific Overdrive-supporting device, a reset pulse at Overdrive speed
has to be issued followed by a Match ROM or Search ROM command sequence. This will speed up the
search process. If more than one Overdrive-supporting slave is present on the bus and the Overdrive Skip
ROM command is followed by a read command, data collision will occur on the bus as multiple slaves
transmit simultaneously (open drain pulldowns will produce a wire-AND result).
Overdrive Match ROM [69h]
The Overdrive Match ROM command, followed by a 64-bit ROM sequence transmitted at Overdrive
Speed, allows the bus master to address a specific DS1963S on a multidrop bus and to simultaneously set
it in Overdrive Mode. Only the DS1963S that exactly matches the 64-bit ROM sequence will respond to
the subsequent memory or SHA function command. Slaves already in Overdrive mode from a previous
Overdrive Skip or a successful Overdrive Match command will remain in Overdrive mode. All Over-
drive-capable slaves will return to regular speed at the next Reset Pulse of minimum 480 μs duration. The
Overdrive Match ROM command can be used with a single or multiple devices on the bus.
Resume Command [A5h]
In a typical application the DS1963S needs to be accessed several times to complete a monetary
transaction. The number of accesses increases further if host/user-Authentication is also performed. In a
multidrop environment this means that the 64-bit ROM sequence of a Match ROM command has to be
repeated for every access. To maximize the data throughput in a multidrop environment the Resume
Command function was implemented. This function checks the status of the RC bit and, if it is set,
directly transfers control to the Memory and SHA functions, similar to a Skip ROM command. The only
way to set the RC bit is through successfully executing the Match ROM, Search ROM or Overdrive
Match ROM command. Once the RC bit is set, the device can repeatedly be accessed through the Resume
Command function. Accessing another device on the bus will clear the RC bit, preventing two or more
devices from simultaneously responding to the Resume Command function.
1-WIRE SIGNALING
The DS1963S requires strict protocols to ensure data integrity. The protocol consists of four types of
signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1, and Read
Data. Except for the presence pulse the bus master initiates all these signals. The DS1963S can
communicate at two different speeds: standard speed and Overdrive speed. If not explicitly set into the
Overdrive mode, the DS1963S will communicate at standard speed. While in Overdrive Mode the fast
timing applies to all waveforms.
To get from idle to active, the voltage on the 1-Wire line needs to fall from V
PUP
below the threshold V
TL
.
To get from active to idle, the voltage needs to rise from V
ILMAX
past the threshold V
TH
. The voltage
V
ILMAX
is relevant for the DS1963S when determining a logical level, but not for triggering any events.
The initialization sequence required to begin any communication with the DS1963S is shown in Figure
11. A Reset Pulse followed by a Presence Pulse indicates the DS1963S is ready to receive data, given the
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1963S+F5 | 制造商:Maxim Integrated Products 功能描述:SHA IBTN 8SOIC - Rail/Tube |
| DS1963S-F5 | 功能描述:iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1963S-F5+ | 功能描述:iButton SHA iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1965S-1-F3 | 功能描述:iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1965S-1-F5 | 功能描述:iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
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