參數(shù)資料
型號(hào)： DS1963S
英文描述： SHA iButton
中文描述： SHA iButton
文件頁數(shù)： 11/37頁
文件大小： 349K
代理商： DS1963S
DS1963S
11 of 37
command, the master must provide the 2-byte target address. After these 2 bytes, the master reads data
beginning from the target address and may continue until the end of the PRNG counter and beyond. The
12 bytes following the PRNG counter are undefined. If the master continues reading the result will be
logic 1’s. It is important to realize that the target address registers will point to the last byte read. The
ending offset/data status byte is unaffected.
The hardware of the DS1963S provides a means to accomplish error-free writing to the memory section.
To safeguard reading data in the 1-Wire environment and to simultaneously speed up data transfers, it is
recommended to packetize data into data packets of the size of one memory page each. Such a packet
would typically store a master-calculated 16-bit CRC with each page of data to insure rapid, error-free
data transfers that eliminate having to read a page multiple times to determine if the received data is
correct or not. (See Application Note 114 for the recommended file structure, which is also referred to as
TMEX Format.)
Erase Scratchpad [C3h]
The purpose of this command is to clear the HIDE flag and to wipe out data that might have been left in
the scratchpad from a previous operation. After having issued the command code the bus master transmits
a target address, as with the write scratchpad command, but no data. Next the whole scratchpad will be
automatically filled with FFh bytes, regardless of the target address. This process takes approximately 32
μs during which the master reads 1’s. After this the master reads a pattern of alternating 0’s and 1’s
indicating that the command has completed. The master must read at least 8 bits of this alternating
pattern. Otherwise the device might not properly respond to a subsequent Reset Pulse.
Match Scratchpad [3Ch]
SHA-1 MACs calculated by the DS1963S are written into the scratchpad. Some calculations such as
those done by the Authenticate Host or Validate Data Page function cause the HIDE flag to be set as well.
The Match Scratchpad command allows this data to be checked without making it publicly readable. The
command compares the 160-bit Message Authentication Code which is found in scratchpad locations
8 through 27 after a SHA computation, as described in the sections “SHA-1 Computation Algorithm” and
“SHA-1 Output Message Formats”, to the result that the master has computed by its own means. After the
master has issued the Match Scratchpad command code it transmits 1 byte after another starting with byte
8 and ending with byte 27. If all bytes match, the master will read a pattern of alternating 0’s and 1’s. If in
addition the AUTH-flag was set, the MATCH-flag will be set. If the comparison was not successful the
master will read all 1’s. The master must read at least 8 bits after having received the inverted CRC16.
Otherwise the device might not properly respond to a subsequent Reset Pulse.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS1963S+F5 制造商:Maxim Integrated Products 功能描述:SHA IBTN 8SOIC - Rail/Tube
DS1963S-F5 功能描述:iButton RoHS:否 存儲(chǔ)類型:SRAM 存儲(chǔ)容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated
DS1963S-F5+ 功能描述:iButton SHA iButton RoHS:否 存儲(chǔ)類型:SRAM 存儲(chǔ)容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated
DS1965S-1-F3 功能描述:iButton RoHS:否 存儲(chǔ)類型:SRAM 存儲(chǔ)容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated
DS1965S-1-F5 功能描述:iButton RoHS:否 存儲(chǔ)類型:SRAM 存儲(chǔ)容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated
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