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參數(shù)資料
| 型號： | DS1962 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 1K-Bit Monetary iButton(1K位貨幣按鈕) |
| 中文描述： | 1K位貨幣iButton的（每1000位貨幣按鈕） |
| 文件頁數(shù)： | 2/22頁 |
| 文件大小： | 147K |
| 代理商： | DS1962 |
DS1962/DS1963
020698 2/22
The scratchpad is an additional page that acts as a
buffer when writing to memory. Data is first written to the
scratchpad where it can be read back. After the data has
been verified, a copy scratchpad command will transfer
the data to memory. This process insures data integrity
when modifying the memory. A 48–bit serial number is
factory lasered into each DS196X to provide a guaran-
teed unique identity which allows for absolute traceabil-
ity. The durable MicroCan package is highly resistant to
environmental hazards such as dirt, moisture, and
shock. Its compact coin–shaped profile is self–aligning
with mating receptacles, allowing the DS196X to be
easily used by human operators. Accessories permit
the DS196X to be mounted on almost any surface
including plastic key fobs, photo–ID badges and printed
circuit boards.
APPLICATION
The DS196X Monetary iButton can store encrypted
data which represents money. The unique registration
number, the page write cycle counters, CRC generator
and tamper–detect bits prevent unauthorized refilling of
the purses. Up to four independent change purses
(DS1963; three purses with the DS1962) can be ran-
domly accessed from the on–chip directory. Tamper–
detect bits report if the purses have experienced physi-
cal tampering. Each write cycle (“Monetary
Transaction”) generates a unique number to audit the
dispensing and refilling of the purses. A change purse
can be decremented with less than 100 ms touch dwell
time for rapid processing in crowded public facilities.
OVERVIEW
The block diagram in Figure 1 shows the relationships
between the major control and memory sections of the
DS196X. The DS196X has four main data components:
1) 64–bit lasered ROM, 2) 256–bit scratchpad, 3)
1024–bit (DS1962) or 4096–bit (DS1963) SRAM, and 4)
three (DS1962) or four (DS1963) 32–bit read–only page
write cycle counters. The hierarchical structure of the
1–Wire protocol is shown in Figure 2. Each of these
counters is associated with one of the 256–bit memory
pages. The three counters of the DS1962 are
associated with pages 1 to 3; the four counters of the
DS1963 are associated with pages 12 to 15. The con-
tents of the counter is read together with the memory
data using a special command. The bus master must
first provide one of the six ROM Function Commands, 1)
Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip
ROM, 5) Overdrive–Skip ROM or 6) Overdrive–Match
ROM. Upon completion of an overdrive ROM command
byte executed at standard speed, the device will enter
Overdrive mode where all subsequent communication
occurs at a higher speed. The protocol required for
these ROM function commands is described in Figure 9.
After a ROM function command is successfully
executed, the memory functions become accessible
and the master may provide any one of the five memory
function commands. The protocol for these memory
function commands is described in Figure 7. All data is
read and written least significant bit first.
PARASITE POWER
The block diagram (Figure 1) shows the parasite–pow-
ered circuitry. This circuitry “steals” power whenever the
I/O input is high. I/O will provide sufficient power as long
as the specified timing and voltage requirements are
met. The advantages of parasite power are two–fold: 1)
by parasiting off this input, lithium is conserved and 2) if
the lithium is exhausted for any reason, the ROM may
still be read normally.
64–BIT LASERED ROM
Each DS196X contains a unique ROM code that is 64
bits long. The first eight bits are a 1–Wire family code.
The next 48 bits are a unique serial number. The last
eight bits are a CRC of the first 56 bits. (See Figure 3).
The 1–Wire CRC is generated using a polynomial gen-
erator consisting of a shift register and XOR gates as
shown in Figure 4. The polynomial is X
8
+ X
5
+ X
4
+ 1.
Additional information about the Dallas 1–Wire Cyclic
Redundancy Check is available in the Book of DS19xx
iButton Standards.
The shift register bits are initialized to zero. Then start-
ing with the least significant bit of the family code, one bit
at a time is shifted in. After the 8th bit of the family code
has been entered, then the serial number is entered.
After the 48th bit of the serial number has been entered,
the shift register contains the CRC value. Shifting in the
eight bits of CRC should return the shift register to all
zeros.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1963L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4 kbit Monetary iButton |
| DS1963L-F5 | 功能描述:iButton RoHS:否 存儲(chǔ)類型:SRAM 存儲(chǔ)容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1963L-F5+ | 功能描述:iButton RoHS:否 存儲(chǔ)類型:SRAM 存儲(chǔ)容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1963L-F5+W | 功能描述:iButton RoHS:否 存儲(chǔ)類型:SRAM 存儲(chǔ)容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1963R-F5+ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
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