參數(shù)資料
型號(hào): DS1844
廠商: Maxim Integrated Products, Inc.
元件分類: 數(shù)字電位計(jì)
英文描述: Quad Digital Potentiometer(四路數(shù)字電位器)
文件頁數(shù): 9/12頁
文件大?。?/td> 95K
代理商: DS1844
DS1844
042498 9/12
14.See Figure 3, 5–wire timing diagram.
15.For 5–wire control logic and V
CC
= 5V
±
10%, maximum V
IL
= +0.8V. For V
CC
= 3.0V
±
10%,V
IL
= +0.6V.
16.Absolute linearity is used to measure expected wiper voltage versus measured wiper voltage as determined by
wiper position. The DS1844 is specified to provide and absolute linearity of
±
0.5 LSB.
17.Relative linearity is used to determine the change in wiper voltage between two adjacent wiper positions. The
DS1844 is specified to provide a relative linearity of
±
0.25 dB.
18.When used as a rheostat or variable resistor the temperature coefficient applies: 650 ppm/
°
C. When used as a
voltage divider or potentiometer, the effective temperature coefficient approaches 30 ppm/
°
C.
19.Maximum ICC active current is dependent on clock rates during serial port activity.
20.t
SETUP
is the minimum time required for the port select input, PS, to be stable before any activity on SDA or SCL
terminals.
21.t
SETUP
is the minimum time required for the port select input, PS, and/or the R/W input to be stable before RST
becomes active (or goes to a high state).
22.See Figure 8, 5–wire timing diagram.
23.Measured with load as shown in Figure 9.
24.Valid for V
CC
= 5V only.
DS1844 BLOCK DIAGRAM
Figure 1
64–to–1 Multiplexer
1 1
64–to–1 Multiplexer
1 0
64–to–1 Multiplexer
0 1
64–to–1 Multiplexer
0 0
H3
L3
H2
L2
H1
L1
H0
L0
W3
W2
W1
W0
POTENTIOMETER–3
POTENTIOMETER–2
POTENTIOMETER–1
POTENTIOMETER–0
8–BIT I/O SHIFT REGISTER
POT SELECT
MSB
LSB
WIPER DATA
POTENTIOMETER SELECT
CONTROL LOGIC CORE
5–WIRE SERIAL
CONTROL LOGIC
PS RST R/W CLK D
IN
D
OUT
2–WIRE ADDRESSABLE
CONTROL LOGIC
PS SCL SDA A2
A1
A0
PS
A1.DOUT
AO/R/W
SCL.CLK
SDA.DIN
A2.RST
INTERFACE
CONTROL
I/O
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