參數(shù)資料
型號(hào): DS1844
廠(chǎng)商: Maxim Integrated Products, Inc.
元件分類(lèi): 數(shù)字電位計(jì)
英文描述: Quad Digital Potentiometer(四路數(shù)字電位器)
文件頁(yè)數(shù): 8/12頁(yè)
文件大?。?/td> 95K
代理商: DS1844
DS1844
042498 8/12
5–WIRE SERIAL INTERFACE
AC ELECTRICAL CHARACTERISTICS
(–40
°
C to +85
°
C; V
CC
=2.7V to 5.5V)
MAX
UNITS
PARAMETER
SYMBOL
MIN
TYP
NOTES
Port Select Setup
t
SETUP
30
ns
14, 21
R/W Setup
t
SETUP
30
ns
14, 21
Clock Frequency
f
CLK
DC
10
MHz
14, 15
Width of CLK Pulse
t
CH
50
ns
14, 15
Data Setup Time
t
DC
30
ns
14, 15
Data Hold Time
t
CDH
0
ns
14, 15
Propagation Delay Time High to
Low Level Clock to Output
t
DV
20
ns
14, 15
RST High to Clock Input High
t
CC
50
ns
14, 15
RST Low from Clock Input High
t
HLT
50
ns
14, 15
RST Inactive
t
RLT
125
ns
14, 15
CLK Rise Time, CLK Fall Time
t
CR
50
ns
14, 15
NOTES:
1. All voltages are referenced to ground.
2. I/O pins of fast mode devices must not obstruct the SDA and SCL lines if V
CC
is switched off.
3. I
CC
specified with SDA pin open.
4. I
STBY
specified with for V
CC
equal 3.0V and 5.0V and control port logic pins are driven to the appropriate logic
levels. Appropriate logic levels specifiy that logic inputs are within a 0.5 volt of ground or V
CC
for the correspond-
ing inactive state.
5. After this period, the first clock pulse is generated.
6. A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the V
IH MIN
of the
SCL signal) in order to bridge the undefined region of the falling edge of SCL.
7. The maximum t
HD:DAT
has only to be met if the device does not stretch the LOW period (t
LOW
) of the SCL.
8. A fast mode device can be used in a standard mode system, but the requirement t
SU:DAT
> 250 ns must then
be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If
such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line t
RMAX
+ t
SU:DAT
= 1000+250=1250 ns before the SCL line is released.
9. C
B
– total capacitance of one bus line in picofarads, timing referenced to (0.9(V
CC)
and (0.1)(V
CC
).
10.Typical values are for ta = 25
°
C and nominal supply voltage..
11. Address Inputs, A0, A1, and A2, should be tied to either V
CC
or GND depending on the desired address selec-
tions.
12.Resistor inputs cannot go below GND by more than 0.5 volts or above V
CC
by more than 0.5 volts.
13.–3dB cutoff frequency characteristics for the DS1844 depend on potentiometer total resistance: DS1844–010;
1 MHz; DS1844–050; 200 KHz; DS1844–100; 100 KHz.
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參數(shù)描述
DS1844_05 制造商:DALLAS 制造商全稱(chēng):Dallas Semiconductor 功能描述:Quad Digital Potentiometer
DS1844-010 功能描述:數(shù)字電位計(jì) IC RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲(chǔ)器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel
DS1844-010+ 功能描述:數(shù)字電位計(jì) IC Quad RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲(chǔ)器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel
DS1844-050 功能描述:數(shù)字電位計(jì) IC RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲(chǔ)器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel
DS1844-050+ 功能描述:數(shù)字電位計(jì) IC Quad RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲(chǔ)器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel