- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄93260 > DS1270Y-100 (DALLAS SEMICONDUCTOR) 2M X 8 NON-VOLATILE SRAM MODULE, 100 ns, PDMA36 PDF資料下載
參數(shù)資料
| 型號(hào)： | DS1270Y-100 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類(lèi)： | Static RAM |
| 英文描述： | 2M X 8 NON-VOLATILE SRAM MODULE, 100 ns, PDMA36 |
| 封裝： | 0.740 INCH, DIP-36 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大小： | 144K |
| 代理商： | DS1270Y-100 |
DS1270Y/AB
6 of 8
102999
POWER-DOWN/POWER-UP CONDITION
SEE NOTE 11
POWER-DOWN/POWER-UP TIMING
(tA: See Note 10)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
VCC Fail Detect to CE and WE Inactive
tPD
1.5
s
11
VCC slew from VTP to 0V
tF
150
s
VCC slew from 0V to VTP
tR
150
s
VCC Valid to CE and WE Inactive
tPU
2ms
VCC Valid to End of Write Protection
tREC
125
ms
(tA=25
°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Expected Data Retention Time
tDR
5
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1.
WE
is high for a read cycle.
2. OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high-impedance state.
3. tWP is specified as the logical AND of CE and WE . tWP is measured from the latter of CE or WE
going low to the earlier of CE or WE going high.
4. tDS is measured from the earlier of CE or WE going high.
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the CE low transition occurs simultaneously with or latter than the WE low transition, the output
buffers remain in a high-impedance state during this period.
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output
buffers remain in high-impedance state during this period.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS1270Y-70 | 2M X 8 NON-VOLATILE SRAM MODULE, 70 ns, PDMA36 |
| DS1270AB-100 | 2M X 8 NON-VOLATILE SRAM MODULE, 100 ns, PDMA36 |
| DS1270AB-70 | 2M X 8 NON-VOLATILE SRAM MODULE, 70 ns, PDMA36 |
| DS1284Q | 1 TIMER(S), REAL TIME CLOCK, PQCC28 |
| DS12885Q | 1 TIMER(S), REAL TIME CLOCK, PQCC28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1270Y-100# | 功能描述:NVRAM 16M NV SRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類(lèi)型:Parallel 訪問(wèn)時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1270Y-70 | 功能描述:NVRAM 16M NV SRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類(lèi)型:Parallel 訪問(wèn)時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1270Y-70# | 功能描述:NVRAM 16M NV SRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類(lèi)型:Parallel 訪問(wèn)時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1270Y-70IND | 功能描述:NVRAM 16M NV SRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類(lèi)型:Parallel 訪問(wèn)時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1270Y-70IND# | 功能描述:NVRAM 16M NV SRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類(lèi)型:Parallel 訪問(wèn)時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。